低電壓電流式主動元件設計

Design of low voltage active circuits of current mode

江致緯(Chih-Wei Chiang)

指導教授 ： 侯俊禮

中原大學/工學院/電子工程研究所/碩士(2002年)

https://doi.org/10.6840/cycu200200104

摘要

本論文中之主要目的在設計一以軌對軌(Rail-to-Rail)為架構之低電壓互補式金氧半互補式全差動運算放大器、第二代電流傳輸器(CCII)、電流回授放大器及雙輸出運算轉導放大器(BOTA)。
而這個軌對軌全差動運算放大器、CCII、CFA和BOTA使用的工作電壓為+1.5V。它們的輸入是由一組NMOS差動對與一組PMOS差動對所組成。此運算放大器具有66dB的直流增益，2.1MHz的單一增益頻寬及64.6度的相位邊限。而CCII有100MHz的電壓追隨頻寬及100MHz的電流追隨頻寬。BOTA則有100MHz的頻寬。我們使用Cadence軟體佈局與驗證，製程技術採用0.5μm CMOS DPDM N-well 製程，整個電路設計採用全客戶設計方式完成。HSPICE 模擬結果是以0.5μm CMOS/Level 49 Model的製程參數所得到的。關於各種電氣參數與量測方法，在本文中亦有介紹。

關鍵字

CCII ； 軌對軌 ； BOTA ； CFA ； CMOS ； 全差動放算放大器

並列摘要

The aim of this thesis is to design a low voltage CMOS rail-to-rail fully differential operational amplifier, Second-Generation Current conveyor (CCII), Current feedback amplifier (CFA) and Balanced output transonductor (BOTA).
The power supply of the rail-to-rail fully operational amplifier, CCII, CFA and BOTA are only +1.5V. Its input stage is composed of an NMOS differential pair a PMOS differential pair. This operational amplifier has a dc gain of 66dB, a unity-gain bandwidth of 2.1MHz and a phase margin of 64.6o. This CCII has bandwidth of voltage follower of 100MHz and bandwidth of current follower is 100MHz. This BOTA has bandwidth of 100MHz. We used the tools of CAD of Cadence to layout and verify. Those circuit have been fabricated with standard COMS IC process of n-well 0.5μm double poly double metal. Full custom design flow has been used in thesis. And HSPICE simulation results are preformed using level 49 model of 0.5μm CMOS process. There are several methods design electrical parameter had been introduced.

並列關鍵字

CMOS ； Rail-to-rail ； CC ； Fully Differential Opamp

參考文獻

[1] B. Wilson , ” Recent developments in current conveyors and current mode circuits”, IEE Proc.G, 1990, vol.137, pp. 63-77.

[2] K. C. Smith, and A. Sedra, ” the current conveyors – A new circuit building block “ , Proceedings of the IEEE, 1968, pp. 1368-1369.

[4] A. Piovaccari,“ CMOS integrated third-generation current conveyor “ Electronics Letters, 1995, vol.31 pp. 1228-1229.

[5] A. S. Sedra, G. W . Roberts, and F. Gohh, “ The current conveyor : history, progress and new results “, IEE Proc. G,1990, vol.137,pp.78-87.

[6] A. Fabrae and M Alami, “ A versatile translinear cell library to implement high performance analog ASICs ” Proc. IEEE EUROASI’90 Conf., 1989, pp. 89-94.