ONO薄膜之研究與記憶體應用

The Study of ONO and Memory Applications

葉智仁(Chih-Jen Yeh)

指導教授 ： 鄭湘原

中原大學/工學院/電子工程研究所/碩士(2002年)

https://doi.org/10.6840/cycu200200529

摘要

目前快閃記憶體元件之特性乃是利用電子儲存於浮動閘極中，藉由臨界電壓的偏移來判別記憶與否。傳統浮動閘極記憶元件是利用複晶矽作為浮動閘極的材料，由於複晶矽所擁有的導電特性，當複晶矽形成之浮動閘極若產生局部漏電將導致全面性的漏電問題。針對此一缺失，將利用已被廣泛研究的ONO結構取代傳統的浮動閘極，其中氮化矽層的導電性較複晶矽來的差，故在漏電問題上，較不易產生傳統浮動閘極全面漏電的危險。本論文依此推論將探討ONO記憶體在克服傳統浮動閘極記憶元件的可行性與其發展的極限。
　　在實驗的部分，將利用熱成長與低壓化學氣相沉積法成長穿隧氧化層-氮化矽層-包覆氧化層(ONO)，並製作成SONOS結構，對SONOS結構電容器進行C-V與I-V特性的量測與分析，來確認量子點捕獲電荷的能力。接著利用此一結構進行記憶元件的製作，完成的元件進行記憶寫入/讀取特性之量測，並進一步確認ONO結構在記憶元件可靠度的表現。
　　在實驗的過程將針對部分製程條件與電性特性作分析，如：在ONO中穿隧氧化層厚度、矽離子佈植對ONO的可靠度與電荷捕陷，以及偏壓的條件與時間對實驗結果的影響。

關鍵字

非揮發性記憶體 ； 氮化物捕陷 ； ONO ； SONOS ； F-N穿隧

並列摘要

Presently, the characteristic of flash memory devices rely on the shift of threshold voltage to estimate for whether the device memorizes or not, by the electron stored in the floating-gate. In traditional floating-gate memory device is utilize poly silicon for the floating-gate material. If the floating-gate formed by poly silicon occurs local leakage, it will result in entire leak of trapping charge, due to the electric conductivity of poly silicon. For the fault, the wield researched structure of ONO will take the place of the conventional floating-gate. In the problem of leakage, the Si3N4 is more difficult to occur the entire leakage due to the electric conductivity of Si3N4 layer is worse than that of poly silicon. According to the inference, the SONOS memory overcomes the feasibility and the limitation of the development for conventional floating-gate memory devices will be discussed in the thesis.
　　In the part of experiment, utilizing the methods of thermal growth and LPCVD to grow tunneling oxide-Si3N4-capping oxide (ONO), and to fabricate the SONOS structure, then takes the measurement and analysis of C-V and I-V characteristic for the capacitor of SONOS structure to ensure the charge trapping ability of the ONO layer. Go on, utilizing this structure to fabricate the memory device, the accomplished device carries the measurement of program/read characteristic out, and further confirm the performance of reliability for the ONO structure in memory devices.
　　In the process of the experiment, the analysis will aimed at some process conditions and electric characteristics, such as the tunneling oxide thickness of the ONO layer, Si-implant for the reliability and charge trapping of ONO layer, and the bias conditions to the effects for the result of the experiment.

並列關鍵字

Nitride-trap ； NVM ； F-N tunneling ； ONO ； SONOS

參考文獻

[1-1]　Frohman-Bentchkowsky,D.“A fulled decoded 2048-bit electrically programmable FAMOS read-only memory”, IEEE J. Solid-State Circuits, 1971, 6, (5), pp.301.

[1-4]　“A low voltage SONOS nonvolatile semiconductor memory technology”, White M. H., Yang Y. L., Purwar A., and French M. L., IEEE Trans. Compon. Packag. Manuf. Technol. A, 1997, 20, (2), pp.190.

[2-2]　J. R. Yeargan, and H. L. Taylor, “The Poole-Frenkel Effect with Compensation Present”, Journal of Applied Physics, vol.39, 1968, pp.5600.

[2-3]　Heyns M. M. and De R. F., ”The Role of Electron and Hole Traps in the Degradation and Breakdown of thermally Grown SiO2 Layers,” Keersmaecker, Mater. Res. Soc. Symp. Proc., Vol.105, p.205, 1988.

[2-4]　Paolo Cappelletti, Carla Golla, Piero Olivo& Enrico Zanoni, “Flash Memories”, Kluwer Academic Publishers, 1999 .