Memory development is an important indicator of the semiconductor industry. The process and performance improvement are always challenging topics. Non-Volatile Memories (NVMs) have been developed for decades, and received much attention in mobile and portable applications. For the purpose of portability and low cost in microelectronics to fulfill the above mentioned criteria is particularly important for NVMs. In this thesis, Channel Punch Through Effects in Non-overlapped Implantation nMOSFET are studied. In order to compare three NVM devices including LDD nMOS and NOI nMOS. TCAD tools including TSUPREM4 and MEDICI are used to simulate these devices electrical and process properties.