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  • 學位論文

應用於可攜式電源管理之低壓降穩壓器設計

Design of Low Dropout Regulator for Portable Power Management Applications

指導教授 : 莊炯承
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摘要


隨著科技不斷的進步,近年來可攜式電子產品的需求量與日俱增。可攜式電子產品是利用內部電池來維持運作,且需要再透過電源穩壓IC的轉換,才能提供系統各內部子系統所需的操作電壓,基於子系統所需的電源規格不盡相同,因此將易造成功率消耗過大而使內部溫度上升和轉換效率降低,進而影響到可攜式電子產品電池的壽命和降低系統的待機時間,而使內部系統無法正常的運作,因此其功率、電源雜訊、系統穩定度、面積與轉換效率等更是格外受到重視。 本研究主要針對可攜式電源管理系統作考量,提出一適用於可攜式無線射頻系統晶片之低壓降穩壓器,結合一具有寬頻與高電源拒斥比之低溫度係數CMOS參考電壓電路,並在無負載電容情況下,也能保持穩定的輸出電壓與系統穩定,並達到低功率、高PSRR等特性,其電路總功率消耗非常低為159uW,且不需要在輸出端接大負載電容來維持穩定度,可以完全將負載電容移除以減省電路板的面積與零件成本,且在無外部負載電容時也有不錯的電源拒斥比能力,其低頻時PSRR為82.8dB、高頻時10KHz為75.55dB。全電路採用國家晶片系統設計中心 TSMC 0.35μm Mixed-Signal 2P4M Polycide 3.3V/5V製程下線製作,晶片佈局面積為1.0358×1.22975mm²。

並列摘要


With the progress of technology, the demand of portable electronic devices are increasing. In order to provide an operation voltage for the internal subsystems of the portable electronic devices, the conversion of the power regulator IC are required. Based on different power specifications of the subsystems required, causing excessive power consumption, the internal temperature rising, lower conversion efficiency, and then affecting the battery lifetime and reducing system standby time that will make the internal system can't be normal operation in portable electronic devices . Hence, the power consumption, power supply noise, stability, the chip area and conversion efficiency are especially important. This study proposed a low dropout regulators combined with a Wide-Range and high PSRR of the low temperature coefficient CMOS voltage reference circuit, that achieved low power, as well as high PSRR and system stability in capacitor-free operation, so it is suitable for portable radio frequency system-on-chip in portable power management system. The total power consumption is 159uW, and the power-supply rejection ratio at 100 Hz and 10 kHz are 82.8 and 75.55dB, respectively. The whole circuit has been implemented in a TSMC 0.35μm Mixed Signal 2P4M Polycide 3.3V/5V technology, and the chip area is 1.0358×1.22975mm².

參考文獻


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