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  • 學位論文

應用於植入式刺激系統之高精度穩壓器

A High Precision Regulator for Implantable Stimulator System

指導教授 : 莊炯承
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摘要


近幾年以來拜科技之賜,植入式電子儀器裝置被廣泛的應用於臨床醫學上,現今開發產品已有植入於體內並準確給予電刺激達到療效或從體內輔助衰竭的器官運作等等來維持身體生理機能。由於直接將電極貼至神經上,刺激電路的供應電壓來源若不穩定,容易造成神經刺激過度或刺激無效,因此,任何植入式刺激系統中都必須存在電源穩壓系統進行穩壓,將外來交流電源進行調節並穩定的輸出給予刺激電路,其特別重視輸出精確度、功率大小、電源雜訊、轉換效率等等。 本研究主要針對植入式刺激器系統為考量,提出適用於植入式刺激器系統之低壓降線性穩壓器,其中包括具有高電源拒斥的能力以及低溫度變異的能隙參考電壓源,在外部無任何負載電容的情況下,也可以保持穩定的電源輸出,在電源供應電壓1.8伏時,輸出的壓降為130mV、靜態電流22μA,達到低功耗,低頻時電源拒斥比(Power Supply Rejection Ratio, PSRR)約為60dB,電壓輸出部分,其線性調節率為5.3mV/V 、負載調節率為0.016mV/mA、輸出電壓的變動率小於0.5%、溫度變異11.3ppm/℃,達到高精準度。全電路採用國家晶片系統設計中心TSMC 0.18μm CMOS Mixed Signal RF General Purpose MiM Al 1P6M 1.8&3.3 製程下線製作,晶片佈局801.35×801.07mm^2。

並列摘要


In recent year, there has been a steady growth in developing electronic devices in the field of implantable biomedical systems. Micro-stimulator has been developed in the body to give accurate electrical stimulation to achieve efficacy or to assist organ failure. Using unstable power source to stimulate the nerve could causes excessive or ineffective neuro-stimulation. Therefore, a voltage regulator is essential for any implantable stimulation systems. A decent regulator usually consists of the following factors - the regulation of output accuracy, power, noise, and efficiency. This research focused on low-dropout linear regulator (LDO) for implantable stimulator system. It presented a compensation design for regulator, modified DFC (Damping-Factor-Control) which helped stabilize the regulator. In other word, this LDO was independent of the off-chip capacitor and equivalent series resistor (ESR). Design results showed that the regulator had a linear regulator of 5.3mV/V, a load regulation of 0.016mV/mA, a output dropout voltage of 120mV, and a output variation less than 0.5% that achieved high precision of the normal output of 1.67V. Besides, the proposed low-dropout regulator (LDO) which the temperature coefficient (TC) of 11.3ppm/℃ was measured with temperature ranging from 0℃to 85℃. The power supply rejection ratio (PSRR) of LDO at 100Hz was 60 dB, and it achieved low power consumption with quiescent current of 22μA. The prototype of the proposed regulator was fabricated by the Taiwan Semiconductor Manufacturing Corporation (TSMC) 0.18μm CMOS 1P6M process. The active chip area of the presented LDO was 801.35μm×801.07μm.

參考文獻


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