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  • 學位論文

非重疊離子佈植記憶元件之多階寫入與陣列驗證的研究

Study of multi-level program verification for the Non-overlapped implantation nonvolatile memory array

指導教授 : 鄭湘原

摘要


隨著數位相機、手機、MP3等消費性電子成為市場上的熱門商品,快閃記憶體(Flash Memory)的市場需求也跟著增加。NOR Flash電路架構能夠提供高速的資料讀取性能,被視為是儲存微處理器指令碼的最佳選擇,且具有平行式(Parallel)介面,提供足夠的位址方便快速資料存取。早期Flash技術架構是SLC(Single-Level Cell),原理是在1個記憶體儲存單元(cell)中存放1位元(bit)的資料,直到MLC (Multi-Level Cell)技術發展後,架構演進為單一個記憶體儲存單元存放2個位元(bit)。 本篇論文主要是探討使用「寫入和讀取驗證(Program and Verify)」的步驟程序,來改善傳統的Program Speed方法在記憶體矩陣電路寫入資料後,臨界電壓(Threshold Voltage, Vth)分佈過寬,Vth分佈位移距離無法準確控制的問題。實驗中「寫入和讀取驗證」的步驟程序,由連續的寫入脈波和讀出驗證步驟,控制每一記憶位元的Vth位移距離及記憶體矩陣電路的Vth分佈收斂度,在記憶元件的總窗值下定義出四個單獨且互相分隔的Vth分佈,代表儲存四個不同的邏輯資料11、10、01、00其中之一,達到記憶容量增加一倍的目標。

並列摘要


As digital cameras, cell phones, MP3 player, and consumer electronics have become a hot commodity nowadays, the flash memories are highly demanded on the market. So far the architecture of NOR Flash circuit can provide high-speed data read performance. Moreover, it also has a parallel-type interface to provide enough addresses for quickly data access. In the past, the Single-Level Cell (SLC) technology has been used in flash memory to store data in a memory storage unit (cell) with 1 bit storage, but now the two bits are stored in a single memory cell can be achieved by Multi-Level Cell (MLC) technology. This work is aiming to develop the program and verify algorithms to improve the wide Vth distribution with the conventional program method. In the new test flow of program and verify algorithms, the Vth shift level of each NOI memory is controlled by the continuously input and read out pulse. The operation also can enhance the convergence of the Vth distribution in the array. In this study, we accomplish four non-overlap states of Vth distribution in the total voltage window (TVW) of the NOI memory array. In this way, the data can be stored into four different logic states such as 11, 10, 01, and 00 in a single cell to achieve higher density storage ability in NOI memory array circuit.

並列關鍵字

NVM Programming Threshold Voltage TVW

參考文獻


Memories,”IEEE Transactions Electron Devices, vol. 52, no. 12, pp.
2648-2653, Dec. 2005
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