感知器學習演算之硬體電路實現

Circuit Implementation of Perceptron with Supervised Learning

翁健豪(Chien-Hao Weng)

指導教授 ： 鄭湘原

中原大學/工學院/電子工程研究所/碩士(2013年)

https://doi.org/10.6840/cycu201300884

摘要

中文摘要
類神經網路(Artificial Neural Network)為用來模仿生物神經結構的資訊處理系統，目前已廣泛的應用在各行各業中；隨著生活水平日益提升，具備可攜性和即時性的硬體已是不可或缺的。而圖形辨識(Pattern Recognition)技術更是類神經系統的重要應用之ㄧ，其應用多為資訊安全、身份認證、醫學影像處理、智慧型電子產品等方面。本論文透過0.25um製程建立8*3之NOI非揮發性記憶元件陣列來實現類神經積體電路之圖形的訓練及辨識，並配合測試儀器來進行計算與回饋。
本論文所採用的類神經法則為感知器學習演算(perceptron learning rule)，其為單層前饋式的網路架構；在辨識方面，本論文將依據樣品的目標值來選定判定的基準，比對經系統運算及判定後的輸出值與相應的目標值，若相符則代表辨識成功。
此外，本論文亦會建立模擬系統來與類神經積體電路做驗證。在驗證步驟方面會採用五種樣板來對軟、硬體系統訓練，且對訓練完成的軟、硬系統進行變異樣板的辨識能力比較。其結果顯示軟、硬體的訓練圈數與速度皆相似。

關鍵字

感知器學習演算法 ； 圖形辨識 ； 發性記憶體 ； 類神經網路

並列摘要

Abstract
Artificial neural network is used to imitate the processes of biological information systems. And it has been widely used in various industries. It has been also presented versatile functionality in different applications. Pattern recognition technology is the key application in neural network which becomes part of our daily lives, such as information security, authentication, medical image processing, intelligent electronic products, etc. In order to realize the architecture of the artificial neural network in circuit forms, a 8x3 non-volatile memory array using non-overlapped implantation nMOSFETs is designed through the 0.25μm CMOS technology. In addition, it is back-proprogated by the memory testing system.
The single-layer feedforward network is used in the this work to achieve the percepttron learning rules. Based on the sample’s target, targets are chosen for evaluating pattern recognition.
In addition, we have compared the hardware of neural network with simulation software. The result of experiment shows that the numbers of training iteration and the training rate of the hardware and the software are similar.

並列關鍵字

NOI ； Artificial Neural Network ； perceptron learning rule ； Pattern Recognition

參考文獻

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