多處理器記憶體測試系統

摘要主機板因32位元線定址的限制故無法定址到4GB以上記憶體，而目前市面上所見主機板已慢慢可支援容量4GB以上的記憶體，但在記憶體測試相關研究中記憶體容量越來越大，將使得記憶體測試時間也將越來越冗長。而記憶體測試中若是以主機板作為測試平台則必須將測試程式建置在作業系統上，但在作業系統中若額外的開啟了許多應用程式，將會導致許多的記憶體位址載入給其他應用程式使用，而無法完成記憶體位址的所有測試，並且將會分散CPU的執行速度，進而影響到CPU運行在測試程式中整體效能的提升。在本論文中我們運用了多核心架構的相關技術，能大幅提升電腦處理資料的能力，更重要的是能加快資料處理的速度，以提升記憶體的測試效率，讓記憶體的測試時間大幅縮短，降低記憶體的測試成本，也在程式中運用了Protect Mode下的Page Mode 定址模式，使得測試程式可支援到4GB以上記憶體測試，也因此可使得多條DIMM可同時安裝至主機板上，沒有4GB的限制，額外的將Dual Channel的效能也可提升至測試程式中。實驗結果顯示，我們的方法可以有效的分配記憶體位址給不同的CPU去執行同步存取的動作，達到有效的記憶體測試效能，不僅可擁有相同偵測記憶體故障的能力，甚至在許多記憶體動作的時序上也將會是更嚴謹的，因此在此本論文中不僅可有效的縮短整體記憶體的測試時間，並且也可以提升整體的測試效率。

關鍵字

作業系統；多處理器

並列摘要

Abstract In the past, motherboard cannot be address to memory over 4GB due to the limitation of 32 bit address. The motherboard available on the market presently can gradually support memory over 4GB, but as the memory capacity in memory tests increases, the memory testing length would increase as well. If a motherboard is used as the testing platform in the memory test, the testing program has to be set on the operating system. However, as the operating system opens extra applications, many addressees of the memory would be loaded to other application, thus unable to complete all tests of memory address, and also disperse the CPU operating speed, in turn, affect the overall efficiency of the CPU in the testing programs. This study used multi-core structure technology to greatly improve the data processing capability of the computer, more importantly, increase the data processing speed, enhance the memory testing efficiency, shorten the testing time, and lower the memory testing cost. It also used Page Mode addressing model under the Protect Mode, so that the testing program could support memory test for over 4GB, and allow multiple DIMM to be installed on the motherboard without the limitation of 4GB. The efficiency of Dual Channel could be enhanced in the testing program. The results showed that the proposed method could effectively allocation memory addresses to different CPUs to carry out synchronized access, in order to achieve efficient memory testing. It not only has the same function of detecting memory malfunctions, it is also more rigorous in the timing of different memories. Therefore, this paper not only could effectively shorten the testing time of memory, but also enhance the overall efficiency.