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  • 學位論文

13-bit全差動增量型三角積分器之類比至數位轉換器

13-bit Fully-Differential Incremental Delta Sigma A/D Converter

指導教授 : 鍾文耀

摘要


本研究目的是設計一個類比至數位轉換器(A/D)的儀器及量測系統,特別是使用離子敏感型場效電晶體感測器;用於水質監控和電子舌系統。 選用增量型Δ-Σ轉換器,主要是因為架構簡單且具有高解析度的能力,增量型類比至數位轉換器(A/D)類似於受歡迎的高解析度Δ-Σ轉換器,此架構中除了增加了重置(reset)讓該轉換器為非連續,而且使用一個簡單的計數器取代功率消耗數位降頻濾波器。此類比至數位轉換器轉換器主要包含兩個部分:前端類比電路方塊和後端數位電路方塊。類比電路方塊包含開關式電容積分器、比較器及一位元的數位至類比轉換器;同時數位電路方塊由一個簡單的計數器組成。 類比調變器是本研究的主要焦點,而為了有更好的雜訊抑制比,使用全差動輸入對,類比調變器架構是使用增益提升運算轉導放大器,可達到105dB的增益及12MHz的單位增益頻寬,使用低偏移的動態比較器架構只有10mV的電壓偏移。所設計的類比至數位轉換器有13位元的解析度,輸入範圍由1.15V至2.15V,相當於1V的全刻度比且輸入頻寬為120Hz,因為輸入只限於直流訊號,所以此規格符合。此外,轉換器的量測線性效能亦是在可接受的範圍內。

並列摘要


This research aims to design an analog-to-digital (A/D) converter for instrumentation and measurement application. Particularly to the ISFET sensors that are used for water quality monitoring and electronic tongue system. The incremental delta-sigma converter architecture was chosen, because of its simplicity and high resolution capability. The incremental A/D converter is similar to the popular high resolution delta-sigma converter. Except that the converter is made non-continues by adding a reset, and the power consuming digital decimator filter is replaced by a simple counter. The converter consists of two parts: the front-end analog blocks and back-end digital blocks. The analog block consists of switch capacitor integrator, comparator, and one bit digital to analog converters. While, the digital block consists of only a simple counter. The analog modulator was the main focus of this research. The fully-differential implantation was used in order to have a better noise rejection. The analog modulator was implemented with a gain boosted operational transconductance amplifier (OTA), which achieved a gain of 105dB and a unity gain bandwidth of 12MHz. A low-offset dynamic comparator structure was used which only have 10mV offset. The designed A/D converter has a resolution of 13 bits having an input range of 1.15V - 2.15V, which corresponds to a full scale ratio of 1V, and an input frequency bandwidth of 120Hz, which is acceptable since the input is limited only to DC signals. Moreover, the measured linearity performance of the converter is within the acceptable range.

參考文獻


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