厚層印刷電路板中貫穿孔連通柱時域波形之分析

Analysis of Time Domain Waveform for Through-Hole Via in Thick Layer Printed Circuit Board

李家豪(Chia-hao Li)

指導教授 ： 薛光華

中原大學/電機資訊學院/通訊工程碩士學位學程/碩士(2019年)

https://doi.org/10.6840/cycu201900417

摘要

本論文研究高速數位電路中厚層印刷電路板的訊號連通柱對於時域反射波形TDR(Time-Domain Reflection)、S11、S21以及阻抗(Impedance)之影響，使用目前實務上有在使用的厚層板，並對訊號連通柱做許多的參數分析來了解對於訊號完整性之影響，以及隨著高速化的趨勢，導致上升時間會對於訊號完整性也會產生影響，還有實務上可能會碰到的關於傳輸線必須要岔開進入訊號連通柱，也將會進行模擬分析，以及當厚層板的層數有變化時，對於時域波形的影響，而最後將會針對一開始模擬分析的厚層板，利用前面所得出的結論製作成設計圖表，在藉由圖表設計出與原始結構相比訊號完整性更好的結構並且模擬驗證。

關鍵字

連通柱 ； 時域 ； 厚層印刷電路板

並列摘要

This paper studies the effects of thick layer printed circuit board of the signal via on the time-domain reflection waveforms、S11、S21 and impedance in high speed digital circuits.
Use the thick layer printed circuit board in reality do a lot of parametric analysis on the signal via to understand the effect on signal integrity and with the trend of high speed, the rise time will also have an effect on signal integrity and the practical connection may be encountered about the transmission line must be opened into the signal via will also do simulation analysis and when the number of the thick layer changes, the effect on the time domain waveform, and finally the thick layer for the initial simulation analysis, using the conclusions obtained in the previous section to make a design chart, designed by the chart a signal integrity structure and simulation verification compared to the original structure.

並列關鍵字

Via ； Time Domain ； Thick Layer Printed Circuit Board

參考文獻

參考文獻

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