本論文提出了一個在多層高速數位印刷電路板使用四分之一波長開路殘段共振器抑制電源線在2.4GHz與5GHz的射頻干擾,本文所提出的濾波器結構為四層板的印刷電路板,使用以下的方案可讓雜訊減少,四分之一波長開路殘段共振器為佈在第三層的帶線結構,藉由在四分之一波長開路殘段共振器的連通柱四周加入四個接地連通柱,可以抑制電磁(Electromagnetics, EM)輻射、平面腔體的共振以及插入損耗(|S21|)的峰值雜訊,電場的分布圖說明了平面腔體共振是如何的影響本論文所提出的結構的插入損失。本文所提出的濾波器結構對於時域的接地彈跳雜訊,以及電源線上與共振器中心頻率相同或是相近的電源雜訊也能有顯著的降低。最後在模擬以及測量中有著相似的表現,結果闡明了本文所提出的濾波器結構對於降低雜訊有著良好的性能。
This work proposes low noise generation radiofrequency interference (RFI) noise suppression filter for a power trace that is based on a quarter-wavelength open-stub resonator (QWOSR) in a multilayered high-speed digital PCB (printed circuit board). RFI noise with frequencies at 2.4GHz and 5GHz is considered. The proposed filter structure is a four-layer PCB. The low noise generation includes the following schemes. The trace of the QWOSR is a stripline on the third layer. Four ground vias are added adjacent to the QWOSR via, which is short. Electromagnetic (EM) radiation noise, plan cavity resonance, ground bounce noise (GBN), and peak noise on insertion loss (|S21|) are all reduced. The electric field distributions are elucidated to understand how the effect of cavity resonance on the insertion loss (|S21|) values of the proposed filter structure. The proposed filter structure significantly reduces the time-domain ground bounce and power noise whose frequency is equal or close to the center frequency of filter. Finally, favorable comparisons between simulated and measured results confirm the excellent low noise generation performance of the proposed filter structure.