在網路蓬勃發展的現今,各種影響網路安全的挑戰也接踵而來,在龐大的資料流中對於每一筆封包進行分析往往超出一般網路設備所系統的負荷,簡單的取樣資料概念以機率採取部分資料做分析,卻又容易受取樣資料影響,因此,在檢驗或偵測流量資料有其必要性的前提下,Sketch演算法以隨機過程的概念並採用少量的資源,實現對於每筆封包進行資料蒐集,並在一定準確率下提供資料勘查,本論文之研究乃於NetFPGA發展板,採用可程式化邏輯閘陣列(FPGA)晶片資源設計,以系統線速度(wire speed)達到高速網路之Sketch更新架構,實現由硬體架構完成Sketch演算法之核心部分,同時提供佐軟體運算組成系統。
Sketch algorithms are widely used in many networking applications due to the excellent properties known to the communities. Motivated by the capability of summarizing the streaming network traffic in a limited computing and storage resources, we explore and implement the sketch update on NetFPGA platform. The thesis presents the analysis and architecture exploration on the NetFPGA with tradeoffs on system resources and performance. The system is verified with live traffic and capable of updating four Gigabit Ethernet traffic at wire-speed.