多重電壓三維積體電路之階層指派問題研究

Layer Assignment for Multiple-Voltage Three-Dimensional Integrated Circuits

沈建志(Jian-Zhi Shen)

指導教授 ： 黃世旭

中原大學/工學院/電子工程研究所/碩士(2014年)

https://doi.org/10.6840/cycu201400765

摘要

摘要
隨著設計複雜度提昇及可攜式產品需求日益增加，要如何儘可能的降低功率消耗，已成為一個重要的設計挑戰。在目前的積體電路設計中，常會使用多重電壓以在達成電路速度要求前提下降低功率消耗。然而，目前對於多重電壓三維積體電路設計，仍未有深入之研究。在本篇論文中，我們探討多重電壓三維積體電路設計的階層指派問題。我們提出一個整數線性規劃的方法，來做到面積最小化。不同於過去階層指派方法，我們不僅考慮元件面積，亦考慮電源分佈線的面積。實驗結果顯示，透過我們的方法，的確可節省功率消耗並且做到面積最小化。

關鍵字

三維積體電路 ； 階層指派 ； 電源分佈線 ； 功率消耗 ； 多重電壓

並列摘要

ABSTRACT
As the complexity of integrated circuit design and the demand of portable products continue to increase, the reduction of power consumption has become an important design challenge. In the modern integrated circuit design, the use of multiple voltages is recognized an effective approaqch to reduce power consumption without sacrificing circuit speed. However, the synthesis of multi-voltage three-dimensional integrated circuit designs has not been well studied. In this thesis, we study the layer assignment problem for multi-voltage three-dimensional integrated circuit designs. We present an integer linear programming approach to minimize the footprint area. Different from previous layer assignment approach, we not only consider the area of cells but also consider the area of power networks. Experimental results consistently show that our approach can save both power consumption and footprint area.

並列關鍵字

Multiple Voltages ； Three Dimensional Integration Circuits ； Power Netowrk ； Layer Assignment ； Power Consumption

參考文獻

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