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  • 學位論文

高解析度且省面積的薄膜電晶體液晶顯示器行驅動晶片研究

Study of High-Resolution and Area-Efficient TFT-LCD Column Driver ICs

指導教授 : 林佑昇
共同指導教授 : 盧志文(Chih-Wen Lu)

摘要


本論文提出了兩種省面積、以全電阻式數位類比轉換器為基礎的薄膜電晶體液晶顯示器行驅動電路。在第一種行驅動電路中,兩個電壓位準移位器和兩個電阻式數位類比轉換器被四個通道共用以節省晶片面積。第二種行驅動電路則是將兩個全解析度的電阻式數位類比轉換器和兩個低解析度的電阻式數位類比轉換器用於四個通道中。這兩個八位元行驅動電路的實驗雛型品已經使用0.35微米CMOS技術實現,以驗證所提出的驅動架構確實可行。第一種行驅動電路量到最大的DNL和INL分別為0.68 LSB和0.68 LSB;第二種行驅動電路量到最大的DNL和INL分別為0.81 LSB和1.11 LSB。相較於傳統以全電阻式數位類比轉換器為基礎的薄膜電晶體液晶顯示器行驅動電路,所提出的第一種和第二種的行驅動電路分別節省了29.6% 和 24.9% 的面積。 在本論文的其餘部分,提出了一個具有內嵌數位類比轉換器於運算放大器的十位元薄膜電晶體液晶顯示器行驅動電路。此十位元分為正極性九位元和負極性九位元兩個部分以節省矽晶片的面積,每一個通道串接了一個六位元雙電壓選出電路和一個三位元內嵌數位類比轉換器的運算放大器。此十位元行驅動器的雛型品已經使用0.18微米CMOS技術實現,並且量到最差的DNL和INL分別為0.29 LSB和0.72 LSB。相較於傳統以全電阻式數位類比轉換器為基礎的行驅動電路,所提出的10位元行驅動器節省了45% 的面積。

並列摘要


This thesis proposes two types of area-efficient fully resistor digital-to-analog converter (R-DAC)-based thin-film transistor liquid crystal display (TFT-LCD) column drivers. In the first type of the column driver, two level shifters and two R-DACs are shared by four channels for die area saving. Two full resolution R-DACs and two less resolution R-DACs are used in four channels of the second column driver. Two experimental prototype 8-bit column drivers were implemented using 0.35-m CMOS technology to verify the proposed driving schemes. The maximum DNL and INL are 0.68 LSB and 0.68 LSB, respectively, for Type-I column driver, and are 0.81 LSB and 1.11 LSB, respectively, for Type-II column driver. Compared with a conventional fully R-DAC based TFT-LCD column driver, the proposed Type-I and Type-II column drivers have an area saving of 29.6% and 24.9%. In the rest of this thesis, a 10-bit TFT-LCD column driver IC with DAC-embedded op-amp is proposed. The 10-bit DACs are divided into positive 9-bit and negative 9-bit components for silicon die area saving. Each channel contains a 6-bit two-voltage selector and a 3-bit DAC-embedded op-amp in a cascaded manner. The 10-bit column driver prototype was realized in 0.18-m CMOS technology with the worst DNL/INL of 0.29/0.72 LSB. Compared with a conventional fully R-DAC based column driver, the proposed 10-bit column driver has an area saving of 45%.

參考文獻


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[4] I. Knausz and R. J. Bowman, “A 250W 0.042mm2 2MS/s 9b DAC for liquid crystal display drivers,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 599–600, 2006.
[5] I. Knausz and R. J. Bowman, “A low power, scalable, DAC architecture for liquid crystal display drivers,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2402–2410, Sep. 2009.

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