應用於W頻帶注入式鎖相除頻器之設計與實現

Design and Implementation of Injection Locked Frequency Divider for W-band Applications

王彥勳(Yen-Hsun Wang)

指導教授 ： 林佑昇

國立暨南國際大學/科技學院/電機工程學系/碩士(2016年)

摘要

本篇論文主要是使用台積電90奈米CMOS製程元件，藉以設計與實現W頻帶的推疊式尾端注入式鎖定除頻器，以及達靈頓尾端注入式鎖定除頻器。而研究主題由以下二個部分構成:

第一部分，我們利用90奈米CMOS製程設計一顆應用在94GHz之寬頻帶的除三推疊式尾端注入式鎖定除頻器。在電路架構方面，使用改良版LC-Tank的共振腔震出電路所需頻帶訊號，再利用堆疊NMOS交叉耦合對疊架構來降低功率損耗，同時，此架構具備兩個優點，第一為取代一般LC-tank中的變容器來使提高電路的操作頻寬，第二為提供負電阻補償LC-tank的損耗，最後在輸出端加上二級的緩衝電路，解決輸出失真問題以及提高輸出功率，而偏壓端亦加上旁路電容使整體電路穩定。

第二部份，利用同製程製作一個應用於94GHz寬頻帶除三達靈頓尾端注入鎖定除頻器。在電路架構方面，延續改良版的LC-Tank共振腔，利用達靈頓提升負載，且能在低偏壓下能操作，所以功率損耗也比較低且鎖定範圍較寬。電晶體的大小決定達靈頓架構的電導，所以電晶體的比例及取捨，取決於設計應用面及所需。另因使用達靈頓架構，會有漏電流的問題及影響，故在設計中加入NMOS二極體用以提供穩定的電流。最後輸出端同樣加上二級的緩衝電路，解決輸出失真問題以及提高輸出功率。

關鍵字

注入鎖定除頻器 ； 達靈頓技術與電路 ； 推疊式交叉耦合對 ； 共振腔

並列摘要

This thesis is mainly using devices of 90nm CMOS process of Taiwan Semiconductor Manufacturing Co. (TSMC), thereby to design and achieve stacked NMOS cross couple pairs as well as Darlington technique of W band. The research topics consist of the following two parts:

The first part, we take advantage of the 90nm process of the divide by 3 widely band stacked NMOS end injection locked divider in the 94GHz.In the a point of circuit architecture, using to mend LC-Tank resonator and the circuit to slips out required the band signal, and make use of the stacked NMOS cross couple pairs to cut down power consumption. Simultaneously, this architecture is provided with two dominant position, the first is to substitute the varactor of mend LC-Tank for general LC-Tank and increase operation bandwidth in the circuit, the second is to offer power consumption of compensatory negative resistance LC-tank. At last, adding two stage buffer that solve output distortion issue in the output as well as increase the output power, and add in the bypass capacitor that will stabilizing whole circuit in the bias.

The second part, we take advantage of the same process of widely band of the divide by 3 of Darlington technique end-injection of locked divider in the 94GHz.In the a point of circuit architecture, the circuit continues to use the mend LC-Tank resonator and make use of Darlington technique in order to increase load and to operate in the lower bias, consequently to have a lower power consumption and a widely locked range. The size dimension of the transistor will determine the transconductance of the Darlington architecture, ergo ratio of the transistor and accept or reject that depends on the design of application and requirement. On the other hand, because of Darlington architecture will cause problem and influence the drain current. Therefore, adding in NMOS diode in the design can stable current. Finally, adding two stage buffer that solve output distortion issue in the output as well as increasing output power and add in bypass capacitor that is stabilizing whole circuit in the bias.

並列關鍵字

injection-locked frequency divider (ILFD) ； Darlington technology and circuit ； Stacked-NMOS cross couple pair ； mend LC-Tank resonator

參考文獻

References

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