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  • 學位論文

毫米波CMOS功率分配器、主動換衡器及單刀雙擲開關之研究

Study of Millimeter-Wave CMOS Power Divider, Active Balun, and SPDT Switch

指導教授 : 林佑昇

摘要


本論文提出了面積微小化的四路功率分配器、高功率處理能力的非對稱單刀雙擲開關與低功耗主動式平衡-不平衡轉換器於毫米波通訊系統之應用。此論文的研究主題第一部分是以TSMC 180-nm製程實現應用於Ka頻帶、V頻帶的四路功分器,以傳統威爾金森功率分配器為基礎,透過集總元件的分析與螺旋耦合傳輸線佈局方式,最終提出了三個面積最小化四路功分器,雙圈螺旋-反向螺旋耦合四路功分器操作在33GHz時, S_11= -9.55dB,S_(22~55)< -12.6dB,S_(21&31)> -2.7dB, S_(23&45)< -23.6dB,〖PD〗_(23&45)< 0.24°,〖AI〗_(23&45)< 0.16,正規化面積為6.4×〖10〗^(-4) (λ_0^2)。雙圈螺旋-非反向螺旋耦合四路功分器操作在33GHz時,S_11= -18.1 dB S_(22~55)<-18 dB, S_(21&31)>-2.06 dB,S_(23&45)<-12.8 dB,〖PD〗_(23&45)< 3.7°,〖AI〗_(23&45)< 0.16,正規化面積為6.9×〖10〗^(-4) (λ_0^2)。雙圈螺旋-反向螺旋耦合四路功分器操作在60GHz時, S_11=-15.8dB,S_(22~55)<-11dB,S_(21&31)>-2.62dB,S_(23&45)<-17.8dB,〖PD〗_(23&45)<4.6°,<0.145,〖AI〗_(23&45)< 0.16正規化面積為1.8×〖10〗^(-3) (λ_0^2)。第二部分是以DTMOS實現基極浮接技術來設計TSMC 180-nm與90-nm製程的單刀雙擲開關,以180-nm製程實現的SPDT開關工作在Tx-mode/Rx-mode(28GHz)時,插入損耗為0.89/3.3 dB,隔離度為 -37.8/-20.4 dB,〖IP〗_(_1dB) =24.3/17.5 dBm。以90-nm製程實現之SPDT開關工作在Tx-mode/Rx-mode(28GHz)時,插入損耗為0.5/2.76 dB,隔離度為 -39.8/-18.04 dB,〖IP〗_(_1dB) =30.6/14.4 dBm,且兩個不同製程的核心電路面積皆為0.078〖mm〗^2。第三部分是以180-nm製程實現28GHz低功耗平衡-不平衡轉換器,該電路在28GHz的輸入回波損耗 S_11= -13.95dB,輸出回波損耗 S_22= -12.39dB, S_33= -10.23dB,輸入與輸出間的隔離度為 S_12= -29.14dB, S_13= -13.18dB,電路增益為 S_21= 4.19, and S_31= 3.24,輸出相位差為181.02°,輸出振幅不平衡為0.95dB,雜訊指數為5.94dB,電路總功耗為7.92 mW,面積為0.65 〖mm〗^2。

並列摘要


This paper presents the application of a 4-way power divider with a miniaturized area and asymmetric SPDT switches with high power processing capacity in a millimeter wave communication system. The first part of the research topic of this paper is to realize the 4-way power divider applied to Ka-band and V-band by TSMC 180-nm process. Based on the traditional Wilkinson power divider, through the analysis of lumped components and the layout of spiral coupled transmission lines, three area minimized 4-way power dividers are finally proposed. The two tune to spiral-couple-line-based inverting 4-way power divider operates at 33GHz, S_11= -9.55dB,S_(22~55)< -12.6dB,S_(21&31)> -2.7dB, S_(23&45)< -23.6dB,〖PD〗_(23&45)< 0.24°,〖AI〗_(23&45)< 0.16, the normalized area is 6.4×〖10〗^(-4) (λ_0^2). When the two tune to spiral-couple-line-based non-inverting 4-way power divider operates at 33GHz, S_11= -18.1 dB S_(22~55)<-18 dB, S_(21&31)>-2.06 dB,S_(23&45)<-12.8 dB,〖PD〗_(23&45)< 3.7°,〖AI〗_(23&45)< 0.16, the normalized area is 6.9×〖10〗^(-4) (λ_0^2). When the two tunes to spiral-couple-line-based inverting 4-way power divider operates at 60GHz, S_11=-15.8dB,S_(22~55)<-11dB,S_(21&31)>-2.62dB,S_(23&45)<-17.8dB,〖PD〗_(23&45)<4.6°,<0.145,〖AI〗_(23&45)< 0.16,the normalized area is 1.8×〖10〗^(-3) (λ_0^2). The second part is to design the SPDT switches in TSMC 180 nm and 90 nm processes by using DTMOS with the body-floating technique. When the SPDT switch in 180 nm process works in TX mode / RX mode (28GHz), the insertion loss is 0.89/3.3 dB, the isolation is -37.8/-20.4 dB, 〖IP〗_(_1dB) =24.3/17.5 dBm. When the SPDT switch realized in 90 nm process works in TX mode / RX mode (28GHz), the insertion loss is 0.5/2.76 dB, the isolation is -39.8/-18.04 dB, 〖IP〗_(_1dB) =30.6/14.4 dBm, and the core circuit area of two different processes is 0.078〖mm〗^2. The third part is to realize 28GHz low power balun with 180-nm process, the input return loss simulation results at 28GHz are S_11= -13.95dB, and the output return loss is S_22= -12.39dB, S_33= -10.23dB. The simulation results of isolation between input and output are S_12= -29.14dB, S_13= -13.18dB, and the isolation between output stages is S_32= -19.44. The output gained is S_21= 4.19, and S_31= 3.24. The output phase difference(PD) is 181.02°, and the output amplitude imbalance(AI) is 0.95dB. The noise figure is 5.94dB. The total power consumption of the circuit is 7.92 mW, and the area is 0.65 〖mm〗^2

參考文獻


[1]林佑昇, 邱弘緯, 梁效彬, “RFID 晶片設計”, 高立圖書, 2011
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