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  • 學位論文

2.45GHz被動式RFID詢答器設計

Design of 2.45GHz Passive RFID Transponder

指導教授 : 許孟烈
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摘要


在本論文中,設計並實現二種2.45GHz被動式無線射頻詢答器標籤晶片。第一種詢答器晶片包含射頻轉直流電路、限壓器、壓控振盪器、數位電路/32位元唯讀記憶體和振幅鍵控調變電路。經量測當發送功率為0.5W EIRP時,使用2dBi天線可於距離40公分處量得倍壓電路輸出約1V,並利用傳輸線量得回傳訊號。晶片採用國家晶片系統中心(CIC)所提供的TSMC 0.18μm 1P6M CMOS製程進行設計與實現,整體晶片面積大小為520μm×740 μm。 第二種詢答器晶片包含射頻轉直流電路、限壓器、偏壓電路、穩壓器、模式選擇器、震盪器、啟動重置電路、數位電路/32位元唯讀記憶體和振幅鍵控調變電路。模擬顯示射頻轉直流電路在發送功率為0.5W EIRP,距離為1公尺使用2dBi天線接收時,可有效驅動電路,並回傳一趨近於100%振幅調變訊號。數位電路功率消耗約為6.4μW,類比電路功率消耗約為2μW。晶片採用國家晶片系統中心(CIC)所提供的TSMC 0.18μm 1P6M CMOS製程進行設計與實現,整體晶片面積大小為675μm×1000μm。

並列摘要


In this thesis two types of 2.45GHz passive RFID transponder chip are presented. The first chip contains RF to DC, limiter, VCO, digital/32-bit ROM and ASK modulator circuits. After measurement when supply power is 0.5W EIRP and transponder uses 2dBi antenna. The output voltage of RF to DC circuit can achieve 1V at a distance of 40cm when the measurement was done at 0.5W EIRP power supply and 2dBi transponder antenna. The return signal is measured through a cable. The chip is designed with TSMC 0.18μm 1P6M CMOS process provided by Chip Implementation Center (CIC). The chip area is 520μm×740μm. The second chip contains RF to DC, limiter, regulator, bias circuit, mode selector, power on reset, ring oscillator, digital/32-bit ROM and ASK modulator circuits. The passive RFID chip achieves 1-meter transmission when the reader power is 0.5W EIRP and the transponder uses 2dBi antenna in simulation. The chip works properly and returns a 100% ASK modulation signal. Power consumption in its digital circuit is 6.4μW and analog circuit is lower than 2μW. The chip is also designed with TSMC 0.18μm 1P6M CMOS process. The chip area is 675μm×1000μm.

參考文獻


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