短通道穿隧電晶體模擬與設計

Simulation and Design of Short-Channel Tunnel Field-Effect Transistors

陳祐萱(Yu-Hsuan Chen)

指導教授 ： 施君興

國立暨南國際大學/科技學院/電機工程學系/碩士(2015年)

https://doi.org/10.6837/NCNU.2015.00306

摘要

穿隧電晶體因藉由閘極電壓控制能帶間穿隧來進行元件開關操作，可超越傳統金氧半場效電晶體的次臨界擺幅物理限制，成為綠能電晶體主要發展方向。本論文利用二維元件模擬，考量適當的量子物理模型，研究短通道穿隧電晶體微縮至10奈米以下的行為，並提出相關的設計方案。

標準結構的穿隧電晶體在元件通道長度微縮至20奈米以下後，受到短通道效應的影響劇增，無法維持良好的電流開關特性。此論文探討了標準結構的穿隧電晶體其短通道效應的電流行為與物理機制，進而提出有效可微縮至次10奈米穿隧電晶體的設計架構。此論文採用非對稱無接面通道之穿隧電晶體結構進行微縮探討，研究結果並與標準結構元件之相關結果比較討論。研究發現，若採用所提出的元件架構與設計參數，將可使穿隧電晶體仍能遵循半導體產業微縮法則繼續縮小。

關鍵字

穿隧電晶體 ； 短通道效應 ； 能帶間穿隧 ； 二維元件模擬 ； 量子束縛

並列摘要

Tunnel field-effect transistor (TFET) has demonstrated its steep subthreshold swing to surpass the physical limit of MOSFET devices, serving as a promising candidate for energy-efficient applications. However, scaling TFET devices into the sub-20 nm regimes suffers from the severe short-channel effects. This thesis elucidates the physical mechanisms of the short-channel effects in conventional TFET devices, and explores the proper design of sub-10 nm TFETs using asymmetric junctionless structure. Two-dimensional device simulations are performed to examine the on-off switching of TFET devices incorporated with appropriate physical models. By employing the proposed asymmetric junctionless architecture, the TFET devices can be successfully scaled down into sub-10 nm regimes to follow the scaling pace for future low-power applications.

並列關鍵字

tunnel field-effect transistor ； short-channel effect ； band-to-band tunneling ； two-dimensional device simulation ； quantum confinement

參考文獻

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