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  • 學位論文

鋁掺入極薄氧化鉿高介電係數閘極介電層之效應

The Effect of Aluminum (Al) Incorporation in Ultra-Thin HfO2 High-k Gate Dielectrics

指導教授 : 劉傳璽 阮弼群
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摘要


氧化鉿薄膜為一良好的高介電係數材料,適合使用在MOS元件,但相較於其他介電材料,結晶溫度過低為其一大缺點,本論文主要將氧化鋁鉿材料取代傳統MOS元件上之閘極氧化層,利用摻雜鋁元素,製備氧化鋁鉿薄膜,以提高氧化鉿薄膜的結晶溫度,並針對其電性、物性做分析與探討。 本研究使用射頻共濺鍍技術,在常溫、充滿氬氣的真空腔體,將高純度的氧化鉿及鋁之靶材,濺射沉積在矽基板上,形成一層厚度7 奈米的氧化鋁鉿薄膜,之後在充滿氮氣的真空腔體中,分別執行650℃、750℃、850℃的快速熱退火,然後鍍上鋁製成閘極電極;最後再利用電流-電壓、電壓-電壓量測儀、穿透式電子顯微鏡、能量散佈分析儀、原子力顯微鏡、X光繞射儀、橢圓測厚儀、X光反射儀等,分析探討氧化鋁鉿薄膜的電性及物性。 實驗結果顯示,氧化鋁鉿薄膜擁有良好的結晶溫度、介電係數、及閘極漏電流,在750℃的快速熱退火後,得到的相對介電係數為14.6,閘極漏電流方面,閘極注入電壓為-1 V時,漏電流大小約為10-6 ~ 10-7 A/cm2,基板注入電壓為1 V時,漏電流大小約在10-5 ~ 10-6 A/cm2,漏電流機制符合蕭基發射,其鋁與介電層間、介電層與矽基板間之蕭基能障分別為0.48 eV及0.72 eV。

並列摘要


HfO2 thin film is a good high-k gate dielectric material for MOS devices, but one main drawback is its relatively low crystallization temperature. In this thesis, the gate dielectric of MOS devices is replaced by HfAlO. Aluminum (Al) has been introduced into HfO2 thin films to form HfAlO films in order to raise the crystallization temperature of HfO2. The electrical and physical characteristics of the MOS devices with HfAlO gate dielectrics were analyzed and discussed in this study. The high-k HfAlO thin films (7 nm) were deposited by RF co-sputtering technique using highly pure HfO2 and Al as the sputtering targets in Ar ambient at room temperature, followed by RTA at 650, 750 or 850 ℃ in N2 ambient. Al was then formed as the gate electrode. The electrical and physical properties of the capacitors were evaluated through I-V (current-voltage), C-V (capacitance-voltage), TEM, EDS, AFM, XRD, ellipsometer, and XRR. The results revealed that the HfAlO thin films have satisfactory crystallization temperature, dielectric constant, and gate leakage current. The relative dielectric constant of the HfAlO film is 14.6 after 750℃ rapid thermal annealing. The gate leakage current is 10-6-10-7 or 10-5-10-6 A/cm2 at a gate bias of 1 or -1 V, respectively. Moreover, the Schottky barrier height at the Al/HfAlO interface or HfAlO/p-Si interface is about 0.48 or 0.72 eV, respectively.

並列關鍵字

High-k HfAlO co-sputtering technique

參考文獻


[1] J. Bardeen and W. H. Brattrain, “A semi-conductor triode”, Physical Review 74, 230 (1948).
[2] W. Shockley, “The theory of p-n junction in semiconductors and p-n junction transistors”, Bell System Technical Journal 28, 435 (1949).
[7] G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-k gate dielectrics: current status and materials properties considerations”, Journal of Applied Physics 89, 5243 (2001).
[8] H. S. Momose, M. Ono, T. Yoshitomi, T. Ohguro, S. Nakamura, M. Saito, and H. Iwai, “1.5 nm direct-tunneling gate oxide Si MOSFET’s”, IEEE Transactions On Electron Devices 43, 1233 (1996).
[9] C. Mahata, M. K. Bera, P. K. Bose, and C. K. Maiti, “Charge trapping characteristics in high-k gate dielectrics on germanium”, Thin Solid Films 517, 163 (2008).

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