俱鐵電效應之鉿基氧化物於負電容及記憶體應用

Ferroelectric Hafnium–based Oxides for Negative Capacitance and Memory Applications

謝孟傑(Xie Meng-Jie)

指導教授 ： 李敏鴻

國立臺灣師範大學/科技與工程學院/光電工程研究所/碩士(2016年)

https://doi.org/10.6345/NTNU202204406

摘要

俱鐵電效應之鉿基氧化物(Hafnium-based Oxides)於近幾年吸引相當多探討，因其俱有製程整合之優勢，與目前半導體製程相容。因鉿基氧化物可由原子層沉積 (Atomic Layer Deposition, ALD)技術成長，故俱超薄物理厚度，且在適當掺雜或退火又俱鐵電特性，若發展至負電容(negative capacitance)效應及記憶體(memory)應用將有低耗功及快速操作之發展潛力。本研究的目標就是發展利用鐵電之鉿鋯基氧化物(Hafnium- Zirconium oxide)，完成負電容電晶體(NC-FETs)及鐵電記憶體(FeRAM)之研究，並討論其在快速響應下之操作速度。於此論文之研究將瞭解發展鐵電之鉿鋯基氧化物應用於未來世代之邏輯電路或記憶體發展之可行性。

關鍵字

鉿基氧化物 ； 負電容效應 ； 記憶體

並列摘要

Ferroelectric Hafnium–based oxides has attracted lots of attention due to the process compatible with currently CMOS process. The physical thickness of the Hafnium–based oxides can be thin down to nanometer scale with the ALD (Atomic Layer Deposition) technology. The ferroelectricity of Hafnium–based oxides is achieved with properly dopants and annealing. The expected advantages, such as low power consumption and high speed operation, may be obtained for the applications of negative capacitance effect and memory. In this study, the Hafnium-Zirconium oxide would be processed and studied. The NC-FETs and FeRAM are fabricated for the response time and operation speed studies. The feasibility of the logic circuit and nonvolatile memory with ferroelectric Hafnium-Zirconium oxide would be discussed in this work.

並列關鍵字

Hafnium-based oxides ； negative capacitance effect ； memory

參考文獻

[1] International Technology Roadmap for Semiconductors (ITRS) Roadmap, 2009.

[2] A. Chen, “Nanoelectronic Device Research for beyond - CMOS Technologies, ” in “Emerging Technologies for the post 14nm Node Area, ” IEEE IEDM short course, Dec. 8, 2012.

[3] J. Müller, E. Yurchuk, T. Schlösser, J. Paul, R. Hoffmann, S. Müller, D. Martin, S. Slesazeck, P. Polakowski, J. Sundqvist, M. Czernohorsky, K. SeIDel, P. Kücher, R. Boschke, M. Trentzsch, K. Gebauer, U. Schröder and T. Mikolajick , “Ferroelectricity in HfO2 enables nonvolatile data storage in 28 nm HKMG,’’ in VLSI Symp. Tech. Dig., 2012, pp. 25-26.

[4] M. H. Lee, J.-C. Lin, and C.-Y. Kao, “Hetero-Tunnel Field-Effect-Transistors with Epitaxially Grown Germanium on Silicon, ” IEEE Trans. on Electron Device, vol. 60, no.7, pp. 2423-2427, 2013.

[5] S. Salahuddin and S. Datta, “Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices, ’’ Nano Lett.,, Vol. 8, No. 2, pp. 405-410, 2008.