鐵電鉿基氧化物之負電容電晶體：直流反應、高速反應、穩定度測試

Ferroelectric Hafnium–Based Oxides Negative-Capacitance FET:DC, Transient and Reliability

唐啟軒(Tang Chi-Hsuan)

指導教授 ： 李敏鴻

國立臺灣師範大學/科技與工程學院/光電工程研究所/碩士(2017年)

https://doi.org/10.6345/NTNU202202000

摘要

具鐵電效應之鉿基氧化物(Hafnium-based Oxides)於近幾年吸引相當多討論，在適當的摻雜與退火後將具有鐵電負電容之特性。應用在電晶體上能夠使其具有陡峭次臨界擺幅陡峭之特性，將大大地降低元件耗能，非常具有作為低功耗元件的潛力。且鉿基氧化物本身與矽基板間有著高相容性，在業界的使用也已行之有年，能夠快速地整合進入現有製程。
本研究將針對不同摻雜與退火條件之鉿基氧化物，以元件應用為前提進行直流操作、快速操作以及可靠度測試的研究。目標是發展利用鐵電之鉿基氧化物做為電晶體，在實用面的材料以及特性分析。累積研究結果，供未來世代元件使用。

關鍵字

鉿基氧化物 ； 負電容效應 ； 暫態分析 ； 穩定度測試

並列摘要

Ferroelectric Hafnium–based oxide has attracted lots of attention due to the negative capacitance effect, and it can be achieved with properly dopants and annealing. Steep SS (Subthreshold Swing) FETs using ferroelectric Hafnium-based oxide has the advantages of process compatibility and devices scale down ability, and it can be the candidates of future IoT era for ultra-low power applications.
In this thesis, the Hafnium–based oxides with various dopants and annealing conditions will be developed. As well as the measurements also be performed, such as DC sweep operation, transient behavior and reliability discussion. The relation between process and material analysis will be discussed, in order to reach high performance electrical characteristics. The promising technology is feasible solution for sub-5nm technology node.

並列關鍵字

Hafnium-based oxides ； Negative capacitance effect ； Transient ； Reliability

參考文獻

[1] International Technology Roadmap for Semiconductors (ITRS) Roadmap, 2009.

[2] S. Salahuddin, and S. Datta, “Can the subthreshold swing in a classical FET be lowered below 60 mV/decade?,” in IEDM Tech. Dig., pp. 693-696, 2008.

[3] M. H. Lee, J.-C. Lin, and C.-Y. Kao, “Hetero-Tunnel Field-Effect-Transistors with Epitaxially Grown Germanium on Silicon, ” IEEE Trans. on Electron Device, vol. 60, no.7, pp. 2423-2427, 2013.

[4] S. Salahuddin and S. Datta, “Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices, ’’ Nano Lett.,, Vol. 8, No. 2, pp. 405-410, 2008.

[5] A. I. Khan, C. W. Yeung, C. Hu, and S. Salahuddin, “Ferroelectric Negative Capacitance MOSFET: Capacitance Tuning & Antiferroelectric Operation, ” in IEDM Tech. Dig., pp. 255-258, 2011.