Ka頻帶升頻混頻器與I/Q調變器設計與實現

Design of Ka-band Up-Mixer and I/Q Modulator

黃絹容(Huang Chuan-Jung)

指導教授 ： 蔡政翰

國立臺灣師範大學/科技與工程學院/電機工程學系/碩士(2016年)

https://doi.org/10.6345/NTNU202204563

摘要

[' 對於射頻收發器系統來說，混頻器與調變器扮演著相當重要的角色，為了達到混頻與高隔離度，現今，混頻器與調變器的設計以砷化鎵製程(GaAs process)為主。隨著CMOS的進步，近年來射頻電路大部份已經成功整合至CMOS 製程當中，且CMOS具有低功率消耗、低成本、高整合度的優勢，因此本論文將設計及實現Ka頻帶升頻混頻器、次諧波混頻器、I/Q調變器。

本論文將介紹第一個電路為Ka頻帶升頻混頻器，藉由電晶體偏壓操作在弱反轉區而達到低功率消耗與低LO驅動功率且有不錯的轉換增益。在IF端加入緩衝放大器(Buffer Amplifier)以提高功率增益。在LO驅動功率為0 dBm時，量測結果之頻帶為15-34 GHz、轉換增益為 1.5±2.5 dB、整體功率消耗約為2.5 mW，LO-IF與LO-RF的隔離度大於45 dB，晶片佈局面積為0.31 mm^2。

然而Ka頻帶升頻混頻器在LO頻率下的功率與低邊頻帶、高邊頻帶的訊號較相近，為了改善這個問題，因此將升頻混頻器延伸至次諧波混頻器降低LO端頻率，也可以降低鎖相迴路與壓控震盪器的設計難度。而第二個介紹的電路次諧波混頻器其2LO-IF與2LO-RF的隔離度大於58 dBm、LO-IF與LO-RF的隔離度大於51 dB，晶片面積為0.6156 mm^2。

為了提高系統的靈敏度，而設計第三個電路為應用於Ka頻帶的正交調變器。藉由輸入訊號分成I路徑、Q路徑兩個路徑，消除輸出高邊頻帶或低邊訊號其中一邊訊號來提高系統的靈敏度與整個系統的線性度。此電路最大特色為擁有較寬頻的鏡像拒斥比，其晶片面積為0.825 mm^2。
']

關鍵字

Ka頻段 ； 正交調變器 ； 混頻器 ； CMOS ； 耦合器

並列摘要

[' Mixer and Modulator play an important role in the radio frequency transceiver. In general, the radio frequency mixers and modulators are implemented in GaAs technology. Recently, the RF circuits have been successfully integrated into the Complementary Metal-Oxide Semiconductor (CMOS) process and CMOS is attractive for low cost, low power consumption and systems-on-a-chip (SoC) applications. Accordingly, this thesis designs and implements Ka-band Up-Mixer, Sub-Mixer, I/Q Modulator.

First, a Ka-band up-conversion ring mixer by employing a weak inversion biasing technique, the ring mixer can operate at low dc consumption power and low LO drive power while maintaining reasonable conversion gain. In addition, add buffer amplifier at IF terminal to provide good conversion gain for the mixer. At low LO drive power mode of 0 dBm, the mixer has conversion gain of 1.5 ± 2.5 dB from 15 to 34 GHz. The dc power consumption is only 2.749 mW from 1.2 V supply voltage. The characters of LO-to-IF and LO-to-RF isolation are lager than 45 dB. The chip area is 0.31 mm^2.

To decrease half of LO frequency that can improve the character of poor signal and noise ratio of a Ka-band Up-Mixer, it also can decrease phase-locked loop and voltage-controlled oscillator difficulty design. The character of 2LO-to-IF and 2LO-to-RF isolation lager than 58 dB, LO-to-IF and LO-to-RF isolation lager than 51 dB .The chip area is 0.6156 mm^2.

For level up sensitivity of system to design third circuit of Ka-band I/Q Modulator. By branch input signal for I-path and Q-path that can remove one of two-tone mixer signal to increase all system sensitivity and linearity.The characteristic of this circuit that have high image-rejection. The chip area is 0.825 mm^2.
']

並列關鍵字

Ka-band ； mixer ； I/Q modulator ； CMOS ； coupler

參考文獻

[1] F. Zhang, E. Skafidas, and W. Shieh, “60GHz doublebalanced up-conversion mixer on 130 nm CMOS technology,” Electron. Lette. vol. 44, no. 10, pp. 633–634, May 2008.

[2] P.-C. Huang, R.-C. Liu, J.-H. Tsai, H.-Y. Chang, H. Wang, J. Yeh, C.-Y. Lee, and J. Chern, “A compact 35–65 GHz up conversion mixer with integrated broadband transformers in 0.18-μm SiGe BiCMOS technology,” in IEEE RFIC Symp. Dig., Jun. 2006.

[3] J.-H. Tsai and T.-W. Huang, “35–65-GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wireless gigabit applications,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 10, pp. 2075–2085, Oct. 2007.

[4] J.-H. Chen, C.-C. Kuo, Y.-M. Hsin, and H. Wang, “A 15–50 GHz broadband resistive FET ring mixer using 0.18-μm CMOS technology,” in IEEE MTT-S Int. Microw. Symp. Dig., 2010, pp. 784–787

[5] J.-H. Tsai, “Design of 1.2 V broadband, high data-rate MMW CMOS I/Q modulator and demodulator using modified Gilbert-cell mixer,” IEEE Trans. Microw. Theory Tech., vol. 59, no.5, pp. 1350–1360, May 2011.