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  • 學位論文

2.4/5.2GHz雙頻段低雜訊放大器

2.4/5.2GHz Dual Band Low Noise Amplifier

指導教授 : 蔡國瑞 王瑞祿
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摘要


多模態之接收系統近年來已被廣泛使用在無線通訊域領,因此對於雙頻元件發展就顯得格外重要。為了能滿足市場對於無線通訊產品的尺寸小、低消耗必v、低成本、高整合性的需求,利用CMOS技術來設計射頻收發機成為一必然的趨勢。 本論文主要在研究應用於WLAN之雙頻LNA的設計與實現技術,將雙頻同步之LNA設計在2.4GHz及5.2GHz兩個操作頻段,且能同時符合IEEE 802.11a及IEEE 802.11b兩協定之規範。本論文中,共設計三種不同架構之雙頻LNA,分別為低電壓、可變增益及折疊式雙頻LNA,以滿足在實際應用上不同需求之應用。低電壓及折疊式之架構可有效降低供應電壓,使電路偏壓只需一般cascode的一半; 可變增益雙頻LNA可在接收到的較大必v信號時,利用可變增益之技術,使其能在低增益模態提供較佳的線性度。 電路之設計是以TSMC所提供的0.18um CMOS製程之model進行模擬,並透過CIC之申請下線來完成晶片之製作。

關鍵字

none

並列摘要


The multi-mode receiver system has been widely used in the wireless communication field. Therefore, the development of dual-band devices is especially important. The wireless products with the smaller size, lower power consumption, lower cost and high integration are the major stream of the current market. Hence, it has become an inevitable trend to use the CMOS technologies to implement the RF transceivers. In this thesis, we have studied the techniques of design and implementation of the dual- band LNAs which are applied to the WLAN systems. The dual-band LNAs enable concurrent support for 2.4GHz (IEEE802.11b) and 5GHz (IEEE802.11a) WLAN systems. We have successfully designed three different structures of dual-band LNA in this thesis. They are one low voltage dual-band LNA, one variable gain dual-band LNA and one folded cascode dual-band LNA, respectively. The supply voltage for the low voltage dual-band and folded cascode dual-band LNAs can be reduced, and is as long as half that for the traditional cascade LNA. On receiving a higher-power signal, the low gain mode of the variable gain dual-band LNA can be enabled to obtain the better linearity. The studied circuits have been designed under the TSMC 0.18um CMOS processes. These Chips have also been fabricated by the support of CIC in Taiwan.

並列關鍵字

folded coscode variable gain dual-band LNA low voltage WLAN

參考文獻


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