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  • 學位論文

新型的NDR元件之設計與應用

Design and Applications of the Novel NDR Devices

指導教授 : 陳耀煌
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摘要


本篇文章我們所使用的新型的負微分電阻元件(negative-differential-resistance;NDR)是利用MOS與HBT之元件所組成。其中我們將NDR元件分類為兩種:其一架構稱為MOS-HBT-NDR元件,另一架構稱為HBT-NDR元件。而其電流-電壓特性曲線呈現Λ型或是N型,所以我們可以稱此架構為Λ型或是N型NDR元件。我們再利用單穩態-雙穩態傳輸邏輯閘(monostable-bistable transition logic element,MOBILE)的操作原理將NDR元件或是NMOS來當負載(LOAD)電路或是驅動(DRIVER)電路,利用並聯在負載(LOAD)或是驅動(DRIVER)電路的金氧半場效電晶體(MOSFET)來調變其I-V特性曲線,來設計類比/數位轉換器、邏輯電路、除頻器。而利用多個NDR元件以串聯或是並聯方式,而其I-V特性曲線呈現出摺疊的特性,以此特性來設計多值記憶器電路。

並列摘要


In this paper,we study the novel negative-differential-resistance (NDR) device which are composed of MOS (Metal-Oxide-Semiconductor Field Effect Transistor,MOS) and HBT (heterojunction bipolar transistors,HBT) is investigated. According to the transistors which were used, the NDR devices were classified into two kinds. First kind of the NDR device is called as the MOS-HBT-NDR device. Second kind of the NDR is called as the HBT-NDR device. According to the I-V characteristics,the NDR device differentiate between Λ type and N type. Two NDR devices are used to design the logical circuit、analog/digital converter and frequency divider. One NDR device is load and the other is driver with the principle of monostable-bistable transition logic element (MOBILE). The I-V characteristic curves of NDR device can be modulated by a MOSFET which is connected parallel with the NDR device. When we connected several NDR devices in parallel or series,the I-V characteristic is foldable. Therefore, we can use of this I-V characteristic to design the multiple-state memory circuit.

參考文獻


[1] Waho, T.; Hattori, K.; Takamatsu, Y. ”Flash analog-to-digital converter using resonant-tunneling multiple-valued circuits” Multiple-Valued Logic, 2001. Proceedings. 31st IEEE International Symposium on22-24 May 2001 Page(s):94 – 99
[2] Tsuji, Y.; Waho, T. “Multiple-input resonant-tunneling logic gates for flash A/D converter applications” Multiple-Valued Logic, 2004. Proceedings. 34th International Symposium on 19-22 May 2004 Page(s):8 – 13
[3] S. J. Wei, “Multivalued SRAM CELL Using Resonant Tunneling Diodes,” IEEE J. Solid-State Circuits, vol. 27, pp. 0018-9200, 1992.
[4] C. Seabaugh et al.,“Nine-state resonant tunneling diode memory,”IEEE Electron Device Lett., vol. 13, pp. 479-481, 1992.
[5] Z. X. Yan et al.,“A new resonant-tunnel diode-based multivalued memory circuit using a MESFET depletion load,”IEEE J. Solid-State Circuits, vol. 27, pp. 1198-1202, 1992.

被引用紀錄


陳彥汶(2010)。可任意控制輸出之多值邏輯電路設計〔碩士論文,崑山科技大學〕。華藝線上圖書館。https://doi.org/10.6828/KSU.2010.00090
李昱寬(2009)。利用BiCMOS製程與負微分電阻電路設計邏輯電路和除頻器〔碩士論文,崑山科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0025-2607200922530100

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