低溫度係數CMOS參考電壓設計

Design of Low Temperature-Coefficient CMOS Reference Voltages

徐 珩(Heng Hsu)

指導教授 ： 劉偉行

國立虎尾科技大學/電機資訊學院/電子工程系碩士班/碩士(2016年)

摘要

本論文提出二種低溫度係數補償之輸出參考電壓電路。電路係利用BJT電晶體的pn接面順向偏壓來產生正負溫度係數，然後再適當的組合正負溫度係數可以實現零溫度係數的參考電壓電路。此外，更進一步進行二階溫度係數補償以減少輸出電壓的變動。相較於已知電路，本論文提出電路具有低功率消耗、架構簡單與較少晶片面積等優點。本論文除了詳細敘述工作原理，並使用HSPICE及LAKER電路模擬軟體以0.35-μm製程參數進行佈局前後模擬及下線製作。

本論文提出之第一種電路是二階溫度係數補償之單端輸出參考電壓電路；經由模擬得到的結果為當供應電壓是2.4V，溫度變化從-20ºC遞增至120ºC時，輸出電壓變化是0.052mV，功率消耗僅有0.457mW，電壓變化率為3.04ppm/˚C。本論文提出第二種電路是二階溫度係數補償之差動輸出參考電壓電路；模擬結果顯示，當供應電壓是2.4V，溫度變化從-20ºC遞增至120ºC時，輸出電壓變化是8.603mV，功率消耗僅有0.897mW，電壓變化率為132.31ppm/˚C。電路模擬結果與理論推導相符合，也證明電路的可行性。本論文所提出之低溫度係數輸出參考電壓電路可適用於各種類比積體電路。

關鍵字

溫度係數 ； 溫度補償 ； 電流鏡 ； 參考電壓 ； 差動模組

並列摘要

In this thesis, two low temperature-coefficient CMOS reference voltage circuits have been proposed. The design principle is based on using the characteristics of the forward-biased pn junction of the BJT transistor to generate the necessary positive and negative temperature-coefficients. Appropriately combine the positive and negative temperature-coefficients, a zero temperature coefficient reference voltage circuit can be realized. Besides, second order temperature-coefficient compensation has been performed to further reduce the variation of the output voltages. As compared with the existed reference voltage circuits, the proposed circuit benefits from low-power consumption, simpler circuit architecture, and less chip area. In this thesis, detailed design principle has been disclosed, also the HSPICE and LAKER simulation program with 0.35-m process parameters have been used to perform the pre-layout and post-layout simulations. According to the post-layout simulation results, under the supply voltage of 2.4V, as the temperature varies from -20oC to 120oC, the output voltage variations of the proposed second order single-ended reference voltage is 0.052mV, the corresponding power dissipation is only 0.457mW and the variation per temperature is 3.04 ppm/˚C. The simulation results of the proposed second order differential mode reference voltage circuit shows that, under the supply voltage of 2.4V, the temperature varies from -20oC to 120oC, the output voltage changes 8.603mV, the power dissipation is only 0.897mW and the variation per temperature is 132.31ppm/˚C. Both the simulation results are consistent with the theoretic analysis. The proposed circuit can be applied to different analog circuits.

並列關鍵字

temperature coefficient ； temperature compensation ； reference voltage ； current mirror ； differential mode

參考文獻

[7] E. K. F. Lee, “A low voltage CMOS bandgap reference without using an opamp ” 2009 IEEE International Symposium on Circuits and Systems, pp. 2533 – 2536, 2009.

[9] Dong-Ok Han, Jeong-Hoon Kim, and Nam-Heung Kim, “ Design of bandgap reference and current reference generator with low supply voltage,” 2008 9th International Conference on Solid-State and Integrated-Circuit Technology, pp. 1733 – 1736, 2008.

[11] Jing-Hu Li, Xing-bao Zhang, and Ming-yan Yu, “A 1.2-V Piecewise Curvature-Corrected Bandgap Reference in 0.5 m CMOS Process” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.9, No. 6, pp. 1118-1122, 2011.

[1] Neil H.E Weste, David Harris，柯鴻禧、黃琪聰(譯)，“COMS積體電路設計概論”台灣培生教育出版股份有限公司，2007。

[2] 謝永瑞，“VLSI概論(修訂四版)”全華科技圖書股份有限公司，2008。