高頻特性分析與模擬應用於28奈米多閘nMOSFETs 包含元件佈局效應

High Frequency Characterization and Simulation for 28nm Multi-finger nMOSFETs with Layout Dependent Effects

魏吉娜(Sravani Vegi)

指導教授 ： 郭治群

國立交通大學/電機學院/電機資訊國際學位學程/碩士(2019年)

摘要

本論文利用台積電28奈米高效能 CMOS製程技術(TN28HPM)實現所設計各式佈局之多閘指(multi-finger MF)元件進行高頻特性分析與參數萃取，以進一步建立等效電路模型用於高頻元件與電路模擬。受惠於先進製程技術TN28HPM，元件閘極長度(Lg)得以大幅縮短至28奈米等級，能夠有效提升其本質元件閘極速度。但是，在高頻元件設計方面，卻因雜散寄生電阻電感與電容(RLC)之急遽增加與複雜之佈局效應而面臨更大挑戰。對於廣泛應用於射頻電路設計中的多閘指元件而言，閘極電阻(Rg)、寄生源極及汲極電阻(RS and RD)與邊緣雜散電容(Cof and Cf(poly-end))之間的消長關係與取捨，乃成為高頻元件特性優化的關鍵因素。
在本論文中，三端和四端多閘指nMOSFET之設計包含不同之源極連線佈局方式，即稱為SLTOD和SLOOD，以及閘指邊緣遮蔽元件名為POCOsh。前者旨在減少RS或RD，而後者即POCOsh旨在減少Cfpoly-end)。此外，本實驗室首創的矩陣方法(matrix method)亦為專有IP，可應用於多閘指nMOSFET以準確萃取與佈局效應有密切關係之RS和RD。完整且深入之高頻特性分析顯示轉導gm，閘極電容Cgg和閘極電阻Rg乃是影響高頻性能優化之關鍵性參數，且在不同的元件佈局中，各個參數可能出現迥異的消長關係，最明顯的例子為採用SLTOD和SLOOD的多閘指nMOSFET，上述元件參數變化之差異對於fT和fMAX的影響而產生不同的優化方向。雖然，SLOOD可以有效減少RS而提升gm，卻同時產生Cgg和Rg增加的缺點，且Cgg和Rg增加之負面效應超過gm提升之效果而導致fT和fMAX反而比採用SLTOD還要低。實測數據顯示，三端多閘指nMOSFET中採用SLTOD者，其多閘指佈局為W2N16和W1N32可以得到最佳fT高達355GHz。然而，就fMAX最佳化而言必須採用W025N128以有效降低Rg，其fMAX可高達約390GHz。但是，對於四端多閘指nMOSFETs，SLTOD和SLOOD的優劣差異又有不同。針對W025N128_4T若採用SLTOD，由於RS的顯著增加導致的gm大幅降低，導致fT和fMAX同時大幅衰減至約250GHz和315GHz。相較之下，採用SLOOD的多閘指nMOSFETs，其三端及四端結構之高頻效能差異不大，以W025N128_3T為例搭配SLOOD所得之最高fT和fMAX僅有255 GHz和258 GHz，明顯低於採用SLTOD的W025N128_3T所能達到的fT和fMAX即306 GHz和390 GHz。此實驗結果有助於多閘指nMOSFETs佈局優化，以達到高頻性能最佳化設計。
再者，本實驗室已開發出小信號等效電路模型，應用於包含佈局相關效應的三端及四端多閘指nMOSFET的高頻模擬。首先，在cold device condition (VDS=0, VGS > VT)建立簡化的MOSFET模型，以準確萃取元件本質的寄生電阻，如Rg, Rs,int和Rd,int，這些乃是導致在VDS=0情況下,Cgs和Cgd非對稱的關鍵參數，其中採用SLTOD和SLOOD者其趨勢相反，且三端及四端多閘指 nMOSFET的差異很大。此外，對於多閘指元件欲利用較大的閘指數(NF)以減少Rg，然而Rs,int和Rd,int卻成了Rg @Y中重要因子而限制了Rg @Y隨著NF增加得以減少之效果，並且導致高頻效能與雜訊之劣化。當元件操作於更高的頻率，本質寄生電感如Ls,int和Lg,int效應增加將導致Rg @ Y的進一步升高，從而造成fMAX的急遽劣化。為此，本實驗室開發了一實際的本質MOSFET模型，其中包含一套完整的本質寄生RLC，用於精確模擬三端及四端多閘指nMOSFET中與佈局效應相關的高頻特性。該等效電路模型可以準確模擬高頻區間的Y參數，並且能夠準確預測元件佈局相關效應所引起的顯著差異。一些特別有趣的佈局相依性出現在Re（Y21）中，即影響fT和fMAX的關鍵參數。對於四端多閘指nMOSFET採用SLTOD和極大閘指數(NF)者，由於Rs,int的顯著增加，Re（Y21）在整個頻段中呈現大幅衰減而導致非常低的fT並且進一步劣化fMAX。另一方面，對於採用SLOOD結構的四端多閘指 nMOSFET，其Rs,int極小因而能夠確保Re（Y21）在低頻區能夠近似理想gm。但是，在高頻區，Ls,int的影響隨著頻率增加，且其效應經由gmLs,int乘積而放大，使得Re(Y21) 在高頻區反而快速下跌進而影響fT。最後，實際本質MOSFET模型與損耗基板模型結合對於模擬預測高頻特性與射頻雜訊十分有用。並且在各種元件佈局中已證明其準確性，能夠有效促進高頻元件優化以應用於毫米波CMOS電路設計。

關鍵字

多指MOSFET ； 有效的流动性 ； 布局依赖效果 ； 高频分析 ； 截止频率 ； 最大振荡频率

並列摘要

In this thesis, high frequency characterization and parameters extraction have been carried out on multi-finger (MF) nMOSFETs in tsmc 28nm high performance CMOS technology (TN28HPM) for equivalent circuit model development adapted to high frequency simulation. The aggressive device scaling with gate length (Lg) target at 28 nm in TN28HPM can achieve significant boost of ideal intrinsic gate speed but faces the challenges in high frequency devices design due to drastic increase of parasitic RLC, containing complicated layout dependent effects. For MF layouts widely used in RF and analog circuits for gate resistance (Rg) reduction, a critical trade off between the Rg, parasitic source and drain resistances (RS and RD), and gate fringing capacitances (Cof and Cf(poly-end)) becomes the major challenge to high frequency devices design for performance optimization.
In this thesis, 3T and 4T MF nMOSFETs with different source line layouts, namely SLTOD and SLOOD, and poly contact shielding (POCOsh) have been designed and fabricated, aimed at reduction of RS or RD, and Cf(poly-end). Matrix method as our group’s proprietary IP can be applied for accurate extraction of RS and RD in the MF nMOSFETs with various layouts. An extensive high frequency characterization indicates a critical trade-off between the transconductance gm, gate capacitance Cgg, and Rg for the optimization of high frequency performance such as fT and fMAX in MF nMOSFETs adopting SLTOD and SLOOD. The MF nMOSFETs with SLOOD can achieve much high gm but reveal obviously lower fT and fMAX than the 3T counterpart with SLTOD, due to the detrimental increase of Cgg and Rg. In summary, the 3T MF nMOSFETs with SLTOD can yield the highest fT up to 355 GHz in case of W2N16 as well as W1N32, and fMAX up to near 390 GHz in case of W025N128. However, the adoption of SLTOD in 4T MF nMOSFETs may suffer degradation of fT and fMAX down to around 250 GHz and 315 GHz in case of W025N128_4T due to much lower gm from the significant increase of RS. In comparison, the MF nMOSFETs with SLOOD indicate minor difference in 3T and 4T configuration, but apparently lower fT and fMAX to below 255 GHz and 258 GHz compared with 306 GHz and 390 GHz in case of W025N128_3T using SLTOD. The results provide useful guideline for high frequency performance optimization in MF MOSFETs design.
Furthermore, small signal equivalent circuit models have been developed for high frequency simulation in 3T and 4T MF nMOSFETs containing layout dependent effects. First, cold device condition was proposed to achieve a simplified intrinsic MOSFET model for accurate extraction of the intrinsic parasitic resistances like Rg, Rs,int, and Rd,int, which are key parameters to be determined for accurate simulation of asymmetric Cgs and Cgd at VDS=0 with an opposite trend between SLTOD and SLOOD, and significant difference in 3T and 4T MF nMOSFETs. Besides, Rs,int and Rd,int appear as detrimental factors to limiting reduction of Rg@Y in case of larger NF. As for higher frequencies, the intrinsic parasitic inductances like Ls,int and Lg,int will lead to further increase of Rg@Y and thus degradation of fMAX. Eventually, an actual intrinsic MOSFET model has been developed, incorporating a complete set of intrinsic parasitic RLC for accurate simulation of the high frequency characteristics with critical layout dependent effects in 3T and 4T MF nMOSFETs. This equivalent circuit model can achieve good match with Y-parameters through high frequencies and accurate prediction of the dramatic differences due to layout dependent effects. Some particularly interesting and important layout and frequency dependence appear in Re(Y21), i.e. the key parameters responsible for fT and fMAX. For 4T MF nMOSFETs with SLTOD and large NF, the dramatic degradation of Re(Y21) through the whole frequencies due to significant increase of Rsint leads to very low fT and further impact on fMAX. On the other hand, for the counterparts with SLOOD, the Re(Y21) can keep the target value at lower frequency due to very small Rsint but suffers severe degradation at higher frequencies, due to the impact from Lsint multiplied by larger gm. Finally, the integration of the actual intrinsic MOSFET models with proprietary lossy substrate RCL network to build up a full equivalent circuit model which can accurately simulate the S- and Y-parameters prior to deembedding has been done for various layouts of TN28HPM and facilitate high frequency device optimization design aimed at mm-wave CMOS applications.

並列關鍵字

Multi finger MOSFETs ； Effective mobility ； Layout Dependent Effects ； High Frequency Analysis ； Cut-off frequency ； Maximum oscillation frequency

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