具有厚的底部氧化層的碳化矽溝槽式金氧半場效應電晶體之製程與特性分析

Process and Characterization of 4H-SiC UMOSFET with Thick Bottom Oxide

顏皓祥(Hao-Hsiang Yen)

指導教授 ： 崔秉鉞 ； 林炯源

國立交通大學/電機學院/電子工程系所/碩士(2019年)

摘要

碳化矽做為寬能隙的材料，擁有高崩潰電壓、良好的熱傳導能力等優勢，適合應用在高功率元件，且有潛力攻佔矽基功率元件市場。然而，碳化矽的金氧半場效應電晶體的高介面能態密度，會導致通道載子的遷移率降低，此外，溝槽式閘極金氧半場效應電晶體的底部氧化層，容易因承受高電壓而崩潰，因此改善介面能態密度，和提高溝槽底部氧化層的耐壓能力，會是研發上兩個很重要的課題，同時，也是本篇論文的目標。
由於去年在氧化鋁爐管中製作的介電層，存在導致平帶電壓飄移的金屬汙染問題。因此，在本篇論文中，我們將氧化環境從氧化鋁爐管換成碳化矽爐管，並使用稀釋一氧化二氮進行氧化，結果，儘管在我們的實驗條件下，稀釋一氧化二氮改善介面能態、氧化層中電荷密度的效果小於乾氧的效果，但本次實驗已確實地排除了金屬汙染的問題。
另一方面，我們這次成功地導通了具有厚的底部氧化層的碳化矽溝槽式金氧半場效應電晶體(TBOX-UMOSFET)，並分析了其導通的原因。接下來，我們量測了其電性，包含了轉換特性、輸出特性、溫度效應及閘極對汲極的電容，並將結果與一般的溝槽式金氧半場效應電晶體(C-UMOSFET)進行比較。我們發現TBOX-UMOSFET的導通電流低於C-UMOSFET的導通電流，但磷的預先非晶化離子佈植(P-PAI)，可以有效的改善輸出特性，並將溝槽底部的氧化層厚度增加到310 nm，儘管如此，電性上會出現臨界電壓減少的問題。
接著，我們量測了UMOSFET的崩潰特性，目標規格是600 V，但在本次實驗中，C-UMOSFET的崩潰電壓最大為110 V，而且，經歷P-PAI的TBOX-UMOSFET具有最低的崩潰電壓。我們推測元件提早崩潰的原因，跟寄生的雙極性電晶體有關，因此，我們探討了可能的解決方案，例如短路n型和p型的4H碳化矽金屬接觸。若能克服提早崩潰的問題，勢必能有效的展現碳化矽高功率電晶體的優勢。

關鍵字

碳化矽 ； U型漕槽式閘極金氧半場效電晶體 ； 金氧半場效電晶體

並列摘要

As a wide-bandgap material, SiC has the advantages of high blocking voltage and high thermal conductivity. This is suitable for the applications of high voltage power devices and occupies the market of Si-based power devices. Nevertheless, large amounts of interface traps density of the SiO2/SiC interface decreases the mobility of inversion carriers. Moreover, the trench bottom oxide of the thick bottom oxide UMOSFET (TBOX-UMOSFET) would suffer from the high electric field and lead to oxide breakdown. As a consequence, they are important issues to improve the quality of SiO2/ SiC interface and capability of high blocking voltage. Moreover, they are the goals of my thesis as well.
Due to the dielectric layer fabricated in the Al2O3 tube last year, there is a metal contamination problem that causes flat band shift. Therefore, we change the oxidation ambients from the Al2O3 tube into the SiC tube, and diluted N2O is used for oxidation in this thesis. As a result, although the effect of diluted N2O passivation under the experimental conditions to improve interface traps density and hysteresis charge density is less than that of dry oxidation. Even though, the experiment does ruled out the problem of metal contamination.
On the other hand, we turn on the TBOX-UMOSFETs successfully in this work and analyze the cause of its turning on. Subsequently, we measure the electrical characteristic of TBOX-UMOSFETs, including the transfer characteristic, output characteristic, temperature dependence and gate to drain capacitor. The result of TBOX-UMOSFETs is compared with C-UMOSFETs. We discover that the on-current of TBOX-UMOSFETs are lower than that of C-UMOSFET. However, the P-PAI could effectively improve the output characteristic and increase the trench bottom oxide to 310 nm. Despite that, there is still a problem of the decreased threshold voltage in electrical characteristic.
Next, we measure the breakdown characteristics of all UMOSFETs. The target specification is 600 V in this work. Unfortunately, the max blocking voltage of the C-UMOSFET is 110 V. and the TBOX-UMOSFET experiencing P-PAI has the lowest blocking voltage. We speculate that the reason for premature breakdown is related to the parasitic bipolar junction transistor (BJT). After that, we figure out some strategies to solve the problem of premature breakdown, such as shorting the n+ and p+ contact together. If we could overcome the problem of premature breakdown, it is possible to achieve better performance of high voltage power MOSFET for 4H-SiC.

並列關鍵字

4H-SiC ； UMOSFET ； MOSFET

參考文獻

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