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  • 學位論文

以人類視覺系統為基礎之彩色影像縮放硬體實現

Hardware Implementation of Color Image Resizing Based on HVS Scheme

指導教授 : 林進燈

摘要


目前市場上,在眾多的消費性電子產品中如:數位相機、數位電視、手機等在追求高品質的影像,取得較高解析度影像畫面的處理方法就更為格外的重要。一些相關的研究探討中,如何從低解析度的影像轉換到高解析度的影像來取得較佳的補插點,過去有提出很多相關的研究,例如雙線性補插或雙立方補插。這種補插方法無法滿足高畫質之需求,因為這些方法可能會使得影像產生模糊或邊緣鋸齒狀。此外,在高解析度彩色影像運算量非常大,因此需要使用硬體來加速演算法處理的速度。 本論文介紹針對彩色影像放大的硬體實現,從一般標準數位視訊訊號或一般儲存媒介(記憶體)中的彩色影像圖片輸入來執行影像的縮放。為提高人類的視覺效果,硬體實現有以下的特點:(1)可經由模糊決策模組能夠自動辨識輸入影像之特徵將其分類,來決定影像補插模組之使用。當輸入影像對肉眼不明顯時,選用雙線性補插方法以節省計算能耗,若輸入影像對肉眼明顯且具有方向性時,為了減少在影像邊緣所產生之鋸齒狀以及模糊狀,則選用邊緣適應性影像補插模組。(2)對於演算法所使用到的指數函數運算,在一個有限值的範圍內可以透過硬體查表的方式來實現,這不僅可以加快計算,並能減少計算錯誤,也不影響精確度。(3) 由於使用Line Buffer設計,使得硬體電路面積可以縮減。 彩色影像放大經由FPGA實現來達到影像縮放的功能,經由實驗的結果,此方法的PSNR與軟體實現方式來比較很相近,並能有效消除邊緣部份鋸齒和模糊的情形,以獲得更好的視覺效果。

並列摘要


At present the market, many consumer electronics products such as digital cameras, digital televisions, and mobile phones are all pursuing the high-quality image. High-resolution video image approach is even more particularly important. Some related researches have investigated how to get a better fill insertion point from a low resolution image to high- resolution image, for example, bilinear or two-cubic interpolation. This interpolation does not satisfy the requirement of a high-quality image due to jagged and blurry defects appearing in an edge. In addition, it is necessary to accelerate the computation with hardware design for the large amount of computation in high-resolution color image data. This thesis presents the hardware implementation for color image resizing to perform color image scaling. The input source can be a standard video signal or a storage device. To enhance the human visual effect, the hardware implementation has the following features. (1) It uses fuzzy decision to automatically identify the characteristic of input image and to decide which interpolation module will be used. If input image is not sensitive to human eyes, the bilinear interpolation will be chosen to reduce computational power. Otherwise, the edge- adaptive image interpolation is chosen to reduce blurry and jagged defects in edge section. (2) For the computation of the exponential function, it is realized through the hardware look-up table in a limited range of values. This can not only speed up computation, but also reduce calculated errors in order to not influence the accuracy. (3) Due to line buffer design, the proposed hardware has smaller area. The color image resizing is realized with FPGA to achieve a scalable image function. By the experimental results, the proposed hardware design and software simulation are approach compared with their PSNR. Simultaneously, this design can effectively eliminate the jagged and blurred part in the edge of an image in order to obtain better visual effect.

參考文獻


[1] C. T. Lin, K. W. Fan, H. C. Pu, S. M. Lu, and S. F. Liang, “An HVS-Directed Neural-Network-Based Image Resolution Enhancement Scheme for Image Resizing,” IEEE Transactions on Fuzzy Systems, vol.15, no.4, pp.605-615, Aug. 2007.
[2] C. C. Wei and C. H. Chen, “Generalized Bilinear Interpolation of Motion Vectors for Quad-Tree Mesh,” International Conference on Intelligent Information Hiding and Multimedia Signal Processing 15-17 pp.635-638 Aug. 2008.
[3] Z. Xiang, X. Zou, and Z. Liu, “An High Quality Image Scaling Engine for Large-scale LCD,” International Conference on Signal Processing, vol. 1, pp.16-20 Nov. 2006
[4] F. M. Candocia and J. C. Principe, “Super-resolution of images based on local correlations,” IEEE Transactions on Neural Network, vol. 10, no. 2, pp. 372–380, 1999.
[5] Z. Shi, S. Yao, and Y. Zhao “A novel video image scaling algorithm based on morphological edge interpolation,” International Conference on Neural Networks and Signal Processing 7-11 pp. 388 – 391, June 2008.

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