新穎六層k‧p模擬器用於受應力(001)及(110)Ｐ型複晶矽，全矽化及金屬閘極Ｐ通道金氧半場效電晶體之閘極電洞穿隧電流

A Novel Six-Band k‧p Simulator for Hole Gate Tunneling Current in (001) and (110) Strained pMOSFETs with Polysilicon, FUSI, and Metal Gates

彭霖祥(Lim-Shyang Pee)

指導教授 ： 陳明哲

國立交通大學/電機學院/電子工程系所/碩士(2011年)

https://doi.org/10.6842/NCTU.2011.00729

摘要

本論文所提出嶄新進階式有效質量近似的演算法可以直接且有效的計算受應力下(001)及(110)晶向Ｐ通道金氧半場效電晶體的閘極電洞穿隧電流．文中也提及傳統的六層kp模型及舊式與進階式的有效質量近似的比較．此演算法已透過幾道程序性的驗證，如（一）自身若合符節的電容與閘極電壓曲線重建；（二）在受應力下的Ｐ型複晶矽，全矽化（ＦＵＳＩ）及金屬閘極Ｐ通道金氧半電晶體晶都有令人滿意的實驗值與模擬值的比較；（三）應力值達負３ＧＰａ對遷移率的增益與已發表的文獻相當一致；以及（四）在有應力及沒有應力的鰭式場效電晶體（ＦｉｎＦＥＴ）（１１０）側壁所發表的文獻實驗值也一一被重建出來．除此之外，透過此進階式有效質量近似的演算法，我們可以觀察與分析在Ｐ型複晶矽閘極Ｐ通道金氧半電晶體（負１．８３ GPA）與全矽化閘極Ｐ通道金氧半電晶體（負２．２９ GPA）所造成閘極電洞穿隧電流不同的起因．

關鍵字

應力 ； 閘極電洞穿隧電流 ； Ｐ通道金氧半場效電晶體 ； 金屬閘極 ； 全矽化閘極

並列摘要

We present an enhanced effective mass approximation (eEMA) algorithm with which one can straightforwardly calculate hole gate tunneling current Ig in (001) and (110) uniaxial compressive strained p-MOSFETs. The differences among the conventional EMA, enhanced EMA, and sophisticated six-band k dot p results are demonstrated. The algorithm is systematically validated in the various ways: (i) self-consistent Cg-Vg curve reproduction; (ii) satisfactory fitting of existing strain altered Ig data for both polysilicon, fully-silicided (FUSI), and metal gates; (iii) good agreement with literature mobility enhancement values for stress up to -3 GPa; and (iv) reasonable fitting of available experimental Ig-Vg curves in (110) sidewall-surface p-FinFETs with and without the stress. Moreover, with the use of the algorithm we can examine the origins of the observed Ig difference between polysilicon gate p-MOSFETs (-1.83 GPa) and FUSI ones (-2.29 GPa).

並列關鍵字

stress ； hole gate direct tunneling ； p-MOSFET ； metal gate ； FUSI gate

參考文獻

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