鍺擴散於氮化矽快閃記憶體之研究

The Investigation of Charge-Trapping Flash Nonvolatile Memory by Using Ge Diffusion into Si3N4 Trapping Layer

張廷瑜(Ting-Yu Chang)

指導教授 ： 荊鳳德

國立交通大學/電機學院/電子工程系所/碩士(2011年)

https://doi.org/10.6842/NCTU.2011.00774

摘要

科技日新月異，隨著消費性電子廣泛的普及化，近年來對於記憶體的需求也日益增加，而各式各樣的記憶體便隨之被發明出來。而屬於非揮發性型態的快閃記憶體也因其具有高密度、良好的資料保存能力以及可重複抹寫的特性，而廣泛的使用在各個領域的電子產品上，如隨身碟、手機/相機記憶卡、各式電子產品程式儲存…等，面對如此龐大的應用，因此對於快閃記憶體特性的提升以及改良是個重要的議題。

現在市場的快閃記憶體依然以傳統的懸浮閘記憶體 (Floating Gate) 為主流，但由於傳統的懸浮閘使用多晶矽 (Poly-Silicon) 作為電荷捕捉層 (Trapping Layer)，在經過多次的寫入 (Program) 以及抹除 (Erase) 操作之後，原本在多晶矽內自由移動的電子也很容易隨著氧化層的缺陷產生路徑回到矽基板，造成資料大量的流失，而此類現象在尺寸的微縮下更加嚴重。且多晶矽也會在相鄰的元件之間產生寄生電容，使得元件與元件之間的電子產生游移，並從而降低可靠度。因此對於資料保存性 (Retention) 以及耐久度 (Endurance) 的考量之下，具有將電子牢牢捉住的氮化物便具有取代傳統多晶矽的潛力。由氮化矽電荷捕捉層所組成的多晶矽/金屬閘極-氧化矽-氮化矽-矽 (SONOS/MONOS) 所組成的結構，可解決傳統懸浮閘微縮問題，並具有良好的電荷儲存能力、低工作電壓特性、並且符合現在互補式金氧半場效電晶體元件 (CMOS) 的製程，現階段已開始有部分廠商開始在產品上使用電荷捕捉式快閃記憶體 (Charge Trapping Flash Memory) 取代傳統懸浮閘了。

為了改良氮化矽的特性，我們不使用離子佈植 (Ion Implantation) 而讓鍺經過高溫擴散至氮化矽。由於經過高溫RTA後，鍺擴散至氮化矽層並且與之產生再次反應。除此之外，LaAlO3/SiO2　雙層穿隧氧化層也達到更快速的讀取/抹除速度和更好的耐久度，而使用高介電材質也讓操作電壓進而下降。
在此論文中，我們比較了使用氮化矽以及鍺/氮化矽兩種載子捕獲快閃記憶體結構。使用鍺/氮化矽結構可以達到3.5nm的等校氮化層厚度，並且具有初始2.9V記憶體窗口大小，以及在室溫中十年後還能保有1.7V的好特性，而耐久性在100 μs 以及 低電壓 16 V P/E 操作過十萬次後還保有2.3V的窗口大小。以上的結果是由於使用鍺擴散至氮化矽而形成矽鍺氮化物的緣故。

關鍵字

鍺 ； 擴散 ； 氮化矽 ； 氮化矽鍺

並列摘要

The rapid advancement of technology with a wide range of consumer electronics is popularity. In recent years, the requirements for memory are increasing and a variety of memory will be invented. Non-volatile flash memory are popular because of its high density, good data retention and program/erase (P/E), while widely used in various fields of electronic products, such as flash drives, mobile phones / camera memory card, many kinds of electronic product code stored ... and so on, faced with such a huge application, so the characteristics of flash memory for upgrading and improvement is an important issue.

Majority of the flash memory market still use the traditional floating-gate memory type, but because of the traditional floating-gate using poly-silicon as the charge trapping layer, after the numerous program and erase operation, carriers (electrons) have moved freely in the poly-silicon, and also very easy back to the silicon substrate through the electronic defects caused by damage in the oxide layer, resulting in the loss of a lot of information, especially serious when the size scale down. And poly-silicon also cause the adjacent parasitic capacitance between the components, making the electrons move freely between each components, and thus reduce the reliability. So for data preservation (Retention) and durability (Endurance) under consideration, nitride has the characteristic of discrete charge-trap, and has the potential to replace the traditional poly-silicon. Charge trapping type consist of the following structure: poly-silicon / metal gate - oxide - silicon nitride - silicon (SONOS / MONOS), solve the problem of the traditional floating gate, and has a good charge storage capacity, low-voltage consumption, and can be embedded with complementary metal-oxide-Semiconductor FET devices (CMOS) manufacturing process, some company have begun to use charge trapping type in their production and replace the traditional floating gate type.

In order to improve the characteristics of Si3N4, we used the Ge diffusion into Si3N4 trapping layer which is different from the usage of ion implantation. We let Ge diffuse into the Si3N4 and react with Si3N4 by high temperature rapid-thermal annealing (RTA). In addition, the band offset in LaAlO3/SiO2 double tunnel layers lowers tunneling barrier for faster P/E speeds and better endurance. The high-κ blocking and trapping layers lower the P/E voltage.

In this study, we compare the Si3N4 and Ge/Si3N4 Charge-Trapping (CT) flash devices. We report a Ge/Si3N4 CT flash memory at a record thinnest 3.5-nm ENT trapping layer, this device has an initial 2.9 V memory window, good retention of 1.7 V extrapolated 10-year retention window at 25oC and 2.3 V endurance window at 105 cycles were measured, under fast 100 μs and low ±16 V P/E. These were achieved by using Ge diffusion the Si3N4 and reacting with Si3N4 to form the GeSi2N4 for better charge storage.

並列關鍵字

Ge ； Diffusion ； Si3N4 ； GeSi2N4

參考文獻

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