晶片厚度、膠材熱膨脹係數及點膠位置對銅柱狀凸塊構裝在熱壓接合及膠材硬化製程條件下之彈性應變能密度效應

Effects of chip thickness, thermal expansion coefficient and dispensing location of underfill on elastic strain energy density in a copper pillar bump package under the conditions of thermal compression bonding and underfill curing processes

陳韋翰(Chen Wei-Han)

指導教授 ： 盧威華

國立屏東科技大學/工學院/材料工程研究所/碩士(2021年)

https://doi.org/10.6346/NPUST202100150

摘要

無資料

關鍵字

銅柱狀凸塊 ； 彈性應變能密度 ； 晶片厚度 ； 熱膨脹係數

並列摘要

無資料

並列關鍵字

Copper pillar bump ； Elastic strain energy density ； Chip thickness ； Thermal expansion coefficient

參考文獻

[1] Makoto, Motoyoshi, 2009,“Through-Silicon Via,” IEEE, Vol. 97, No. 1,pp. 43-48.

[2] Noboru, A., Yoshinori M., Masatsugu N., Yoshihito M., and Yoshiyuki A., 2015, “High Productivity Thermal Compression Bonding for 3D-IC,” International 3D Systems Integration Conference , pp. TS7.3.1-TS7.3.5.

[3] Lin, V., Kao, N., Jiang D. S., and Hsiao, C. S., 2013, “Stress Simulation and Design Optimal Study for Cu Pillar bump Structure,” 2013 IEEE 15th Electronics Packaging Technology Conference, pp. 598-601

[4] Lee, Y. C., Kao, C. L., Yannou, J. M., Lee, and C. C., 2013,“Copper Pillar Shape and Related Stress Simulation Studies in Flip Chip Packages,” IEEE Eurpoean Microelectronics Packaging Conference, pp. 1-5

[5] Park, S., Bang, H., Bang, H., and You, J.,2012,“Thermo-mechanical analysis of TSV and solder interconnects for different Cu pillar bump types,”Microelectronic engineering, Vol. 99, pp. 38-42.