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  • 學位論文

鎖相迴路架構的頻率合成器與資料回復器設計

THE DESIGN OF PLL-BASED FREQUENCY SYNTHESIZER AND CLOCK/DATA RECOVERY CIRCUIT

指導教授 : 黃淑絹
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摘要


根據鎖相回路(PLL)的設計理論,本篇論文設計了由LC振盪器組成的頻率合成器以及利用環形振盪器組成的資料回復器。其中,頻率合成器是應用於802.11a 的標準,電路包括頻率相位檢測器、充電幫浦、迴路濾波器和預除器。高速預除器是採用注入鎖定及米勒除頻器。另外,我們設計一應用於2.488GHz之光纖通訊的資料回復器。其組成部分包括相位檢測器、充電幫浦、迴路濾波器和環形振盪器。我們利用simulink和ADS來模擬此兩種架構在系統及電路層級的特性。這些設計是使用台積電的TSMC 0.18 CMOS 製程、供應電壓為1.8伏特。

並列摘要


Based on the phase-locked-loop (PLL) design concepts, this thesis presented the designs of a RF frequency synthesizer with a LC-tank voltage-controlled oscillator and a clock and data recovery (CDR) circuit with a ring oscillator. The implementation of the frequency synthesizer for 802.11a includes the building blocks such as the phase frequency detector, charge pump, loop filter and prescaler. A high-speed prescaler is designed based on injection-locked and Miller frequency dividers. The implementation of the CDR circuit for 2.488GHz optical communications is also presented. The building blocks of CDR that including phase detector, charge pump, loop filter and VCO are discussed and designed. The circuits are simulated with simulink and ADS to verify the system- and transistor- level performances based on TSMC 0.18um CMOS one-poly six-metal (1P6M) technology with a 1.8V supply.

並列關鍵字

FREQUENCY SYNTHESIZER PLL

參考文獻


[1] B. Razavi and R. H. Yan, “Design of High-Speed, Low-Power Frequency Dividers and Phase-Locked Loops in Deep Submicron CMOS,” IEEE J.Solid-State Circuits, vol.30, NO. 2, pp. 101-109, Feb. 1995.
[2] B. Razavi, “Design of Analog CMOS Integrated Circuits,” Mcgraw-Hill,2001.
[4] B. Chang, J. Park, and W. Kim, “A 1.2GHz CMOS Dual-Modulus Prescaler Using New Dynamic D-Type Flip-Flops,” IEEE J. Solid-State Circuits, vol. 31, pp. 749-752, May 1996.
[5] J. Yuan and C. Svensson, “High-Speed CMOS Circuit Technique,” IEEE J. Solid-State Circuits, vol. 24, pp. 62-70, Feb. 1989.
[7] F. M. Gardner, “Charge-Pump Phase-Lock Loops,” IEEE Trans. on Communications, vol. 28, no. 11, pp. 1849-1858, Nov. 1980.

被引用紀錄


徐邦磊(2006)。動平衡檢測儀之自動追蹤濾波系統開發〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://doi.org/10.6841/NTUT.2006.00046

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