應用於802.11a之鎖相迴路頻率合成器

DESIGN OF THE PHASE-LOCKED LOOP FREQUENCY SYNTHESIZER FOR 802.11a

吳嘉哲(Chia-Che Wu)

指導教授 ： 詹耀福

大同大學/電機資訊學院/電機工程學系所/碩士(2012年)

摘要

本篇論文參考IEEE 802.11a標準規格設計一個適用於無線通訊802.11a的5.8GHz鎖相迴路頻率合成器。本文所描述的頻率合成器包含相位頻率偵測器(PFD)、電荷幫浦(CP)、迴路濾波器(LF)、LC-tank形式的壓控振盪器(VCO)，注入鎖定除頻器(ILFD)、以及採用pulse-swallow架構整合為單一計數器的除頻器。
壓控振盪器採用NMOS架構，比傳統壓控振盪器可得到較高的輸出振幅和較低的相位雜訊注入式鎖定除頻器之架構，可以降低功率消耗及可應用在高頻的操作頻率,但操作頻寬範圍有限。
本頻率合成器是以台積電0.18微米CMOS 製程參數，並經由ADS的模擬結果來證明了本頻率合成器的可行性。

關鍵字

頻率合成器 ； 注入鎖定除頻器 ； 脈波吞噬除頻器

並列摘要

In this thesis, we refer to the IEEE 802.11a standard and design a 5.8GHz phase-locked loops frequency synthesizer fitting the specification. The phase-locked loops frequency synthesizer consists of a phase-frequency detector, charge pump, loop filter, LC-tank VCO, injection locked frequency divider and a pulse-swallow architecture frequency divider with only one counter.
The proposed LC-tank voltage-controlled oscillator adopts NMOS cross-coupled pair in order to get larger output voltage swing and using injection locked frequency divider in order to get low phase noise. The injection-locked frequency divider can decrease power consumption and operate in high frequency, but the operation range of bandwidth is limited.
The frequency synthesizer is implemented by TSMC 0.18-μm single-poly six-metal CMOS process. The ADS simulation results justify the feasibility of the proposed phase-locked loops frequency synthesizer.

並列關鍵字

injection locked frequency divider ； pulse swallow frequency divider ； frequency synthesizer

參考文獻

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[2] Behard. Razavi, Monolithic Phase-Locked Loops and Clock Recovery Circuits : Theory and Design, Piscataway, NJ: IEEE Press, 1996.

[3] H. R. Rategh, H. Samavati, and T. H. Lee, “A CMOS Frequency Synthesizer with an Injection-Locked Frequency Divider for a 5-GHz wireless LAN Receiver.” IEEE J. Solid-State Circuits, vol.35, NO.5, pp. 780-787, May 1998.

[5] A. Hajimiri and T. H. Lee, “A General Theory of Phase Noise in Electrical Oscillator,” IEEE J. Solid-State Circuits, vol.33, pp. 810-820, May 1998.

[6] Behard. Razavi, “A Study of Phase Noise in CMOS Oscillators,” IEEE J. Solid-State Circuits, vol. 31, pp. 331-343, Mar. 1996.