利用改良式的基底四蝴蝶結構設計並實現之腓特比解碼器

在本篇論文中我們為腓特比解碼器提出了一個新的基數四蝴蝶架構，我們利用分支對稱特性來設計了一個簡化的基數四蝴蝶模組來降低實現軟性決策的腓特比解碼器複雜度，在此分支對稱特性中我們只需要計算一半的分支計量值，另一半分之計量值則可以從已知的分支計量值推導而得到，因此在基數四蝴蝶中的分支計量值計算量可以降低1/2，然後我們用提出的簡化模組來建構一個腓特比解碼器並且利用硬體描述語言VHDL來撰寫，最後再使用ISE 6.1i(Xilinx公司開發的合成工具軟體)與ModelSim XE III 6.0a(模擬工具軟體)來進行合成及驗證。模擬結果指出在FPGA之運算單元使用數目上，我們提出的基數四蝴蝶設計可以比傳統的設計降低19%，此外利用此架構的腓特比解碼器整體而言也有11%的下降。

關鍵字

腓特比解碼器；基底四；複雜度；計算量；蝴蝶結構；對稱特性

並列摘要

In this paper we presents a new radix-4 butterfly design for Viterbi decoders. The branch symmetry of the proposed radix-4 butterfly is exploited to design a reduced radix-4 butterfly module to simplify the implementation of the soft-decision Viterbi decoder. By exploiting the branch symmetry, only a half of branch metrics need to be computed, while other metrics can be derived from the computed branches. Therefore, the branch metric computation of the radix-4 butterfly can be reduced by a factor of 2.Then we use the proposed reduced module to build a Viterbi decoder and described in VHDL code. Finally synthesis and simulation has be done by using ISE 6.1i(Xilinx synthesis tool) and ModelSim XE III 6.0a(simulation tool). Experimental results indicate that the proposed radix-4 butterfly design can reduce the number of FPGA slices of the radix-4 butterfly module by 19% over the conventional design; moreover, the Viterbi decoder with proposed radix-4 butterfly modules can reduce the number of slices about 11%.

並列關鍵字

Viterbi decoder ； butterfly ； radix-4

參考文獻

[13] E. Paaske, and J. Dahl Andersen, “High speed Viterbi decoder architecture,”

[1] B. Sklar, Digital Communications- Fundamentals and Applications, Prentice-Hall,

[2] A. J. Viterbi, “Convolutional codes and their performance in communication

[3] G..D. Forney, Jr., “The Viterbi algorithm,” Proc. IEEE, vol. 61, pp.268 - 278, Mar. [2] 1973.

[4] H. I. Lou, “Implementing the Viterbi algorithm,” IEEE Signal Processing Magazine, [4] pp.42-52, Sep. 1995.

國際替代計量

利用改良式的基底四蝴蝶結構設計並實現之腓特比解碼器

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