使用切換電容可調式共振器之低功耗雙取樣三位元六階帶通差和調變器

在本篇論文中，我們提出一可調式切換電容(SC)共振器之雙取樣三位元六階帶通差和調變器。它藉由可調式切換電容共振器，僅需三顆運算放大器即可實現六階差和調變器，使整體功率消耗較傳統架構來的低。在前饋式架構中的共振器僅需處理量化雜訊，可避免原始訊號經由非線性共振器所造成失真的影響，並且可減少電路的複雜度。使用可調式共振器，可以針對寬頻或窄頻運用規格所需要的超取樣比值 (OSR) 調整架構上的參數，以選取雜訊轉換函數之最佳陷波 (notch) 頻率來增進在低超取樣率(OSR)情況下之訊號對雜訊及失真比(SNDR)。最後利用雙取樣技術，不但可以提高取樣頻率還可舒緩放大器速度上的規格要求。在設計流程中，首先我們先利用MATLAB及SIMULINK來驗證所設計電路之穩定性以及效能。接著利用Hspice作電晶體架構之模擬，最後在TSMC 0.18um CMOS 1P6M之規格下進行電路之實現工作。整體架構之效能模擬在1.5伏特電源供應，80MH之取樣頻率下，輸入中心頻率為20MHz之弦波為訊號。於頻寬為5MHz(OSR=8)，其最大訊號對雜訊及失真比在輸入為-4.2dBFS為49.54dB，整體消耗功率為25.17mW。

關鍵字

差和調變器；六階

並列摘要

In this thesis, we proposed a switched-capacitor (SC) double-sampling three-bit sixth-order band-pass delta-sigma modulator based on tunable resonators. It achieves sixth-order noise shaping by using tunable SC resonators and only three opamps are used so that the overall power consumption is lower than the conventional architecture. The feed-forward topology can reduce the distortion in the signal path, and efficiently reduce the circuit complexity. Besides, the tunable resonator can increase the signal-to-noise and distortion ratio (SNDR) in lower oversampling ratio situation by properly adjusting the resonator frequency to obtain the optimum notch frequency. In addition, double-sampled technique provides a good method of increasing the sampling frequency without many efforts and relaxes the performance requirement of the operational amplifier. The design procedure is summarized in the following: First, we use MATLAB and SIMULINK to verify the stability and estimate the performance. Then, Hspice is used for transistor level simulation. The final implementation of the modulator works at 1.5V supply, 80MHz clock frequency and the center frequency of the input signal is 20MHz in TSMC 0.18um CMOS 1P6M process. The simulation result is 49.54dB with -4.2dBFS for 5MHZ bandwidth and the power consumption is 25.17mW.

並列關鍵字

six-order ； delta-sigma modulator

參考文獻

[1]S.-C. Huang, M.-H. Liao, and C.-S. Hsu, “A low-distortion fourth-order bandpass delta-sigma modulator,” in Proc. IEEE Int. Symp. Circuits Syst., pp. 5383-5386, 2006.

[2]J. Silva, U. Moon, J. Steensgaard, and G. C. Temes, “Wideband low-distortion delta-sigma ADC topology,” Electron. Lett., vol. 37, no.12, pp. 737-738, Jun. 2001.

[4]L. Cardelli, L. Fanucci, V. Kempe, F. Mannozzi, and D. Strle, “Tunable bandpass sigma delta modulator using one input parameter,” Electron. Lett., vol. 39, no. 2, pp. 187-189, Jan. 2003.

[6]L. Longo and B.-R. Horng, “A 15 b 30 kHz bandpass sigma-delta modulator,” in Proc. IEEE ISSCC Dig. Tech. Papers, pp. 226-227, Feb. 1993.

[7]G. C. Temes, “Finite amplifier gain and bandwidth effects in switched- capacitor filters,” IEEE J. Solid-State Circuits, vol.15, pp. 358-361, June 1980.

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使用切換電容可調式共振器之低功耗雙取樣三位元六階帶通差和調變器

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