高效能低成本的2-D DCT架構設計和FPGA實作

High Performance and Low Cost DCT Architecture and Implementation

陳紀豪(Ji-Hau Chen) ； 陳慶瀚(Ching-Han Chen)

《2008資通技術管理與應用會議》 2008 (2008/12) Pp. 348-359

摘要

離散餘弦轉換在影音訊號壓縮應用扮演著非常重要的角色。本文設計了一個高效能的二維DCT/IDCT電路架構。我們採用NEDA架構進行無乘法器的DCT電路設計，並以FPGA完成硬體驗證。在效能方面，此一DCT硬體的系統時脈可達58MHZ；在管線架構下，每8個時脈週期就可完成一筆8x8二維離散餘弦轉換，具有極高的效率，可應用在各種即時影音壓縮／解壓縮系統；在精確度方面，透過實際JPEG壓縮流程驗證，使用浮點數軟體DCT與本文所設計的硬體DCT比較，其PSNR相差僅約0.33db。

並列摘要

Discrete cosine transform (DCT) plays a significant role in the application of multimedia signal compression. In this paper, we proposed a high performance two dimensional DCT/IDCT circuit architecture. We designed a multiplier-less DCT circuit with the NEDA architecture, and implemented it on FPGA. As for the performance, the system clock of our DCT circuit can reach 58MHz, and the circuit finishes an 8x8 DCT transformation every eight clocks under the pipeline architecture. It can be applied in any kind of real-time multimedia compression/decompression system. As for the precision, the deviation of PSNR (Peak Signal to Noise Ratio) between float-point software DCT and our fixed-point hardware DCT is about 0.33db through the same JPEG compression process.