在金氧半元件中金奈米粒子間氧化層陷阱的研究

本論文中，我製做金氧半結構含有化學還原法製成的金奈米粒子的元件，以應用於儲存電荷。對於金奈米粒子的密度，我利用掃描式電子顯微鏡驗證。對於元件儲存電荷的特性，我利用高頻電容電壓量測，從元件的記憶窗口大小 (Memory Window Size)來比較電荷儲存量。另一方面，也藉由量測定電壓下元件電容對時間的變化，計算出等效的電荷流失率，以比較出元件對於儲存電荷的保持能力 (Charge Retention)。對元件的研究中，以金粒子沉積密度作為調控變因，當金奈米粒子密度增加造成記憶窗口增大的同時，卻也有電荷保持力下降的影響，此為電荷有部分儲存於氧化層缺陷之影響。另外想要進一步改善元件的效能，利用準分子雷射快速熱退火修補氧化層中的缺陷，但卻發現金粒子經過雷射能量加熱後熔融，擴散至氧化層中導致在偏壓下崩潰的現象發生，所以控制氧化層遭到雷射轟擊的厚度將會影響元件後來的電性量測不同，但是在特定條件下，雷射熱退火所產生的局部高溫具有修補氧化層缺陷之效果。

關鍵字

金氧半元件；金；奈米粒子

並列摘要

In this work, Metal-Oxide-Semiconductor structure with Au nanocrystals formed by chemical redundant method for charge storage is fabricated. Scanning Electron Microscope is utilized to calculate the density of nanocrystals. In the characterization of memory performance, we use high frequency capacitance-voltage (C-V) measurement to measure the memory window size for comparing the storage capacity and charging efficiency. On the other hand, through the time dependent variation of device capacitance measured under fixed voltage, the effective charge loss rate can be calculated to compare the retention regarding the stored charge of devices. In the study of device, we compared the impacts between different structural parameters at first, include using gold nanoparticles and silver nanoparticles, and the variance of different diameters of gold nanoparticles, such as 10 nanometer and 20 nanometer. When the density of the gold nanoparticles increased also has influence that charge retention dropping while causing the memory window size increasing. Further, we want to improve the performance of device in addition, using excimer laser annealing to fix the defects in oxide layer, but we find the gold nanoparticles would be melted after heated by laser, and diffused into oxide layer then break down under the bias voltage.

並列關鍵字

MOS ； gold ； nanoparticle

參考文獻

[1] D.Frohman-Bentchkowsky, “Memory behavior in a floating-gate avalanche -injection MOS (FAMOS) structure”, Appl. Phys. Lett. 18, 332 (1971).

[2] J. D. Blauwe, “Nanocrystal Nonvolatile Memory Devices”, IEEE Trans. Nanotechnol, col. 1 (1), p.72, 2002.

[3] Z. Liu, C. Lee, V. Narayanan, G. Pei and K. Kan, “Metal Nanocrystal Memories-Part I: Device Design and Fabrication”, IEEE Trans. Electron Devices, vol.49 (9), p.1606, 2002.

[4] Aaron Thean and Jean-Pierre Leburton, “Flash memory: towards single-electronics”, IEEE Potentials, p.35, 2002.

[5] H. I. Hanafi, S. Tiwari, and I. Khan, “Fast and Long Retention-Time Nano-Crystal Memory”, IEEE Trans. Electron Devices, vol.43 (9), p.1553, 1996.

國際替代計量

在金氧半元件中金奈米粒子間氧化層陷阱的研究

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