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  • 學位論文

步進馬達控制器之軟硬體設計與實現

Hardware/Software Design and Implementation of Stepper Motor Controller

指導教授 : 陳宗正

摘要


本論文主要是以軟硬體共同設計為基礎,實現一個「嵌入式步進馬達控制系統」。我們首先介紹數位系統中軟硬體共同設計流程與古典設計流程間的比較,並且深入探討在軟硬體共同設計流程中,硬體與軟體之間的相互關係與設計方法。在步進馬達變速控制方面,本論文提出一個速度特性規劃演算法則。此演算法則具備了遞迴之特性,並且容易實現在FPGA上。 為了確保軟硬體間資料傳輸的正確性,在硬體設計方面,我們採取同步式有限狀態機進行設計,並搭配Avalon Memory-Mapped技術與嵌入式處理器整合。此外,我們將監控程序以軟體設計的方式呈現,以達成閉迴路控制之目標,並且搭配硬體抽象層的設計來完成軟硬體整合。 此系統結合開迴路控制與閉迴路控制,並搭配增強型遞迴速度特性產生器來實現步進馬達自動化變速控制。更甚的是,本系統可根據使用者所輸入的馬達轉速、加速模式與運轉圈數,自行判斷該輸入條件是否會導致失步現象的發生。一但發生失步現象,系統便會自動切換至閉迴路控制;反之,則執行開迴路控制。最後,此系統以Nios II嵌入式處理器為核心,並搭配自行設計之硬體,實現於DE2開發板上。

並列摘要


The main idea of this thesis is to implement an embedded control system for stepper motor, which is based on the concept of hardware/software co-design. First, we introduce the design flows of classical and cooperative, also we discuss the relationship between hardware and software, and design methods in co-design flow. In the variable speed control for stepper motor side, we propose an algorithm to achieve the variable speed control. This algorithm is capable of recursion, and realizing on FPGA easily. To guarantee the correctness of data transmission, we use the synchronous finite-state machine (FSM) to design the algorithm unit in hardware, and use Avalon Memory-Mapped (Avalon-MM) technology for integrating with embedded processor. In addition, we design the monitoring program in software for closed-loop achieving, and design the hardware abstraction layer (HAL) in order to system integration. This system consists of open-loop and closed-loop controls, and couples with the enhanced velocity profile generator (EVPG) to realize the variable speed control for stepper motor. Furthermore, this system can judge the conditions which input by user, such as rotation speed, acceleration mode, and running revolution for motor, whether the missing step effect occurs. Once the missing step effect occurs, system would switch to the closed-loop control automatically. Otherwise, the open-loop control works still. Finally, this system core is based on Nios II embedded processor, and realization on DE2 development board.

參考文獻


[1] A. Avila, R. Santoyo, S. O. Martinez, and G. Dieck, “Hardware/Software Implementation of a Discrete Cosine Transform Algorithm Using SystemC,” Reconfigurable Computing and FPGAs, 2005. ReConFig 2005. International Conference on, pp. 4-7, 28-30 Sep. 2005.
[3] C. C. Chang, “Design and Implementation of Autonomous Parking Control System for Dual-Sensors Car-Like Mobile Robot using Nios Embedded Processor System,” Master thesis, Department of Electrical Engineering, National Cheng Kung University, June, 2005.
[6] D. Carrica, M. A. Funes, and S. A. Gonzalez, “Novel stepper motor controller based on FPGA hardware implementation,” IEEE/ASME Transactions on Mechatronics, Vol. 8, pp. 120-124, 2003.
[7] D. Kos, A. Kapun, M. Curkovic, and K. Jezernik, “Efficient Stepper Motor Torque Ripple Minimization Based on FPGA Hardware Implementation,” IEEE Industrial Electronics, IECON 2006-32nd Annual Conference, pp. 3916-3921, in Paris, France, Dec. 2006.
[8] D. O. Carrica, S. A. Gonz?鴣ez, and M. Benedetti, “A High Speed Velocity Control Algorithm of Multiple Stepper Motors,” Elsevier, Mechatronics, Vol. 14, Issue 6, pp. 675-684, 2004.

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