利用SPICE雙載子電晶體/金氧半元件模型方法分析考慮浮動基體效應的40奈米部分解離絕緣體上矽N型矽金氧半元件

The Bipolar/MOS SPICE Model Approach for Analyzing 40nm PD SOI NMOS Device Considering Floating-Body Effect

方上維(Shang-Wei Fang)

指導教授 ： 郭正邦

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2011年)

https://doi.org/10.6342/NTU.2011.01475

摘要

本篇論文討論一個考慮浮動基體效應的部分解離絕緣體上矽金氧半元件，透過雙載子電晶體/金氧半元件模型方法建立SPICE的模型進行模擬。第一章先簡介絕緣體上矽金氧半元件及其元件之特性，並且比較部分解離絕緣體上矽和完全解離絕緣體上矽之間的差異。第二章說明了部分解離絕緣體上矽金氧半元件的電流傳導機制，接著利用了雙載子電晶體/金氧半元件模型方法建立起模型，並藉由量測值及二維元件模擬器件驗證了雙載子電晶體/金氧半元件模型方法在直流下的準確性。第三章利用考慮浮動基體效應的部分解離絕緣體上矽金氧半元件之交流模型討論暫態的分析，寄生雙載子電晶體的電流增益因閘極電壓上升時間較長而增大，並利用二維元件模擬驗證了雙載子電晶體/金氧半元件模型方法在暫態下的準確性。第四章結論和未來展望。

關鍵字

絕緣體上矽

並列摘要

The thesis reports modeling the 40nm PD SOI NMOS device considering floating-body effect via Bipolar/MOS SPICE model approach. Chapter 1 gives a brief introduction about SOI CMOS devices and the scaling trends, including the comparison of the difference between the PD SOI and the FD SOI CMOS devices. Chapter 2 describes the current conduction mechanism of the PD SOI MOS and the compact model constructed from Bipolar/MOS SPICE model approach. As verified by experimentally measured data and 2D simulation results, the compact model of the PD SOI NMOS provides an accurate prediction under DC condition. Chapter 3 discusses the ac model of the PD SOI MOS devices considering the floating body effect for transient analysis. From the study, during the turn-on transient, the current gain of the parasitic bipolar transistor becomes larger as the longer rise time of the gate voltage. As verified by 2D simulation results, the compact SOI model gives an accurate prediction of transient behavior. Chapter 4 is conclusion and future work.

並列關鍵字

SOI ； SPICE

參考文獻

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