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  • 學位論文

以差動差分電流傳輸器設計電壓式四階高通濾波電路之非理想效應研究與改善

Non-ideal Effect and Improvement of the Fourth-Order Voltage-Mode High-Pass Filter Employing DDCCs

指導教授 : 張俊明
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摘要


摘要 在積體電路的世界裡,需求之頻率越來越高,而所使用的電路面積卻是越做越小,而在類比濾波電路設計領域上,其電路首要重視的就是輸出訊號的精準度,使輸出訊號能準確的操作在我們所預定的工作頻率,但目前業界的改善方法,是為了得到更精準或彌補電路誤差不斷增加其補償電路,而將電路複雜並加大了所需要的面積,但這並不是最佳的電路解決方式,論文中探討了影響電路效能與準確度的幾個因素,並提出直接從內部改善方式,對電路做非理想分析,探討出影響輸出信號不精準的因素,再利用所求的被動元件對頻率響應的敏感度分析做深入研究,設計出之電路則要求以最少之節點數目和使用最少主被動元件,所以電路面積之使用可降為最低,並且不需要外接其它的補償電路,便可達到精準的輸出濾波信號。本文所提出之電路主要使用一種特別的電流式主動元件:差分差動(Differential Difference Current Conveyor,簡稱DDCC)來設計電壓式四階高通濾波電路。此主動元件具有低功率消耗、低雜訊、低電路製作成本,設計出之電路不但輸出精準、電路精簡及低成本,具有低敏感度之優點,是相當有利於積體化電路之製造和量產。本論文中所提之電路,均使用H-spice軟體來進行電路模擬,當中參考的製程參數為TSMC035μm,並於實際模擬結果與理論之間相互得到驗證。

並列摘要


Abstract The world of intergraded circuits will be requested for higher frequency and smaller process. And in the analogy filter circuit design, its electric circuit most important takes is output signal essence, causes the output signal accurate operation the frequency which prearranges in us. But discovered formerly designed in electric circuit, in order to output finer or makes up the electric circuit flaw unceasingly addition compensating circuit, but was complex the electric circuit, that was not the beast way suit to solve the circuit’s problem. Have probed into several factors of influencing circuit efficiency and accuracy in the thesis, propose improving the way from the inside directly, Make non- ideal analysis to the circuit, to explore it’s influences outputting the factor not perfect of the signal, the sensitivity that and then utilize passive components asked to respond to frequency is analyzed and further investigated, the circuit designed is required with the least nodal figure and the least active elements, so the use of the circuit area can be lowered to it is the lowest, and does not need outer and other compensation circuit, can reach the perfect output and strain the wave signal. The circuit we talk about on this paper uses one special active element, namely, differential difference current conveyors (DDCCs) to design the voltage-mode four orders High-pass filter. Also during the process of producing, the chip area can be smaller, the noise of chips can be lessened, and the cost can be cut down. Have advantage of the low sensitivity, it is manufacture and quantity that quite help to accumulate the body circuit that are produced. Hence, such circuit is worth target researching thoroughly. The simulation of this paper uses H-spice with supply voltage ±1.65V and used TSMC035 process to obtain the results .

並列關鍵字

ddcc

參考文獻


[2] K. C. Smith and A. Sedra, ‘‘The current conveyor-a new circuit building block,’’ IEEE Proc, vol. 56, pp. 1368-1369, 1968.
[3] B. Wilson, “Constant bandwidth voltage amplification using current conveyor,” Int. J. Electronics, vol. 65, no.5, pp. 983-988, 1988.
[4] Sedra/Smith,: “Microelectronic Circuits”, Third Edition.
[5] B. Wilson, “Recent developments in current conveyors and current mode circuits,” Proc. Inst. Elect. Eng., pt. G, 137 (2), pp. 63-77, 1990.
[6] K. C. Smith, and A. Sedra, “A second-generation current conveyor and it's applications”, IEEE Trans., CT-17, pp.132-134, 1970.

被引用紀錄


余俊賢(2014)。以差動差分電流傳輸器及完全差分電流傳輸器設計電壓式四階低通與高通濾波電路〔碩士論文,中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201400617

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