以差動放大器為基礎的壓控振盪器與鎖相迴路之研究

A Study of VCO & PLL Based on Differential Amplifiers

林明信(Ming-Hsin Lin)

指導教授 ： 蔡澈雄

崑山科技大學/工程學院/電子工程研究所/碩士(2008年)

摘要

本論文中以Tsmc 0.35μm BICMOS Mixde Singal SiGe製程，使用供給電壓為3.3V，利用差動式的高輸入阻抗、高輸出阻抗和高電壓增益來實現壓控振盪器電路並將運用在鎖相迴路系統電路中。其中壓控振盪器電路是以差動放大器與主動負載差動放大器的為設計基礎架構所組成，可分為MOS、BJT等架構。
在鎖相迴路部份，是以主動負載差動振盪器為主要核心，來設計出Bi-CMOS與MOS主動負載振盪器的兩種鎖相迴路架構。
電路模擬軟體方面，利用Advanced Design System(ADS)來進行模擬，對Bi-CMOS主動負載鎖相迴路鎖定頻率為800MHz，鎖定時間為31.06μs，相位雜訊在1MHz offset為-140(dBc/Hz);而MOS主動負載鎖相迴路鎖定頻率為1.12GHz，鎖定時間為13.24μs，相位雜訊在1MHz offset為-136(dBc/Hz)。
在晶片量測部份，以Bi-CMOS主動負載鎖相迴路量測到鎖定頻率為750MHz，相位雜訊在1MHz offset為-116.5(dBc/Hz)，消耗功率13.2mW;而MOS主動負載鎖相迴路量測到鎖定頻率為950MHz，相位雜訊在1MHz offset為-111.4(dBc/Hz) ，消耗功率19.8mW，鎖相迴路晶片總面積(包含PAD)為669 x 572μm2。

關鍵字

差動壓控振盪器 ； 主動負載差動壓控振盪器 ； 鎖相迴路

並列摘要

The wafer process in this thesis is Tsmc 0.35 μm BICMOS Mixed Signal SiGe, its supply voltage is 3.3 volts. The differential amplifier has high input impedance, high output impedance and high voltage gain characteristics. We use these characteristics to implement an oscillator. These oscillators are made by differential amplifiers and active load differential amplifiers. The differential amplifiers have MOS and Bi-CMOS structures.
We design PLL by using MOS and Bi-CMOS active load differential amplifier as main core and structure.
Advanced Design System (ADS) is the circuit simulation software. The Bi-CMOS PLL locking frequency, locking time and phase noise in simulation are 800 MHz, 31.06 μs and -140 dBc/Hz (1MHz offset) respectively. The MOS PLL locking frequency, locking time and phase noise in simulation are 1.12 GHz, 13.24 μs and -136 dBc/Hz (1MHz offset) respectively.
The Bi-CMOS PLL locking frequency, phase noise and power consumption in chip measurement are 750 MHz, -116.5 dBc/Hz(1MHz offset) and 13.2 mW respectively. The MOS PLL locking frequency, phase noise and power consumption in chip measurement are 950 MHz, -111.4 dBc/Hz(1MHz offset) and 19.8 mW respectively. The PLL total chip area (including PAD) is 669 x 572μm2.

並列關鍵字

Differential Amplifier Oscillators ； Active Load Differentila Amplifier Oscillators ； Phase-Locked Loop

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