直接轉矩與磁通控制演算法之磁滯控制器及其相關電路之晶片設計與分析

The Design and Analysis of the Hysteresis Control Chip with Direct Torque Control and Flux Control Algorithms

林長緯(Chang-Wei Lin)

指導教授 ： 宋國明 ； 譚旦旭

國立臺北科技大學/機電學院/機電整合研究所/碩士(2006年)

摘要

本論文係以標準單元為主(Cell-based)數位積體電路(IC)製作流程，並使用聯電0.18微米1P6M(UMC .18μm 1P6M)的製作技術來研發馬達用之直接轉矩控制(Direct Torque Control, DTC)專用晶片。直接轉矩控制是在定子座標軸上分析感應電動機的數學模式，藉由輸入的磁通和轉矩量，做為輸入命令的一種控制方法，經由磁滯控制器的控制及電壓向量切換表輸出適合的電壓向量。
本論文以Verilog程式設計，軟體驗證由ModelSim軟體來完成，硬體驗證則由可規劃邏輯閘陣列(FPGA)擔綱，再經由模擬軟體ModelSim進行暫存器轉換階層(RTL)模擬、閘階層(Gate-level)模擬分析與驗證。實驗結果顯示，本論文中所製作的積體電路(IC)各方塊功能均正確，所提架構對提升數位控制系統性能和控制法則硬體化有很大的幫助。

關鍵字

直接轉矩控制 ； 磁滯控制器 ； Verilog硬體描述語言 ； 標準單元設計 ； 保護時間

並列摘要

The main research of the thesis is based on cell-based digital IC design flow, By using the UMC 0.18um 1P6M cell library, we design a direct torque control IC for induction motor. The theory of direct torque control was used to analyze the mathematical model of the induction motor on a stator coordinate axis. The input control parameters one both magnetism flux and torque, Then we can obtain a variety of voltage vectors through the hysteresis controller and the voltage space vector switch table.
Using Verilog HDL to design, Furthermore, the FPGA is also used for hardware verification. After the processes of RTL simulation, Gate level simulation, the designed code will be transferred into ASIC. The proposed control architecture contributes to the advancement of digital control performance and control algorithm realization of control algorithm.

並列關鍵字

Direct Torque Control ； Hysteresis Controller ； Verilog HDL ； Cell-based Design ； Dead Time

參考文獻

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