應用於WiMAX通訊系統之Σ-Δ分數型頻率合成器設計

Design of Sigma-Delta Fractional-N Frequency Synthesizer for WiMAX Communication System

黃博彥(Bo-yen Huang)

指導教授 ： 薛木添

國立中央大學/資訊電機學院/電機工程學系/碩士(2007年)

摘要

近年來，隨著科技的發展，頻率合成器在通訊系統中除了要有良好的相位雜訊外，也需要有寬的可合成範圍，在本論文中設計了一個適用於WiMAX通訊系統中且具有寬頻合成範圍的分數型頻率合成器，其中包含了相位頻率檢測器(PFD)、充電泵(CP)以及迴路濾波器(LF)、互補式LC交錯耦合壓控振盪器(VCO)、脈衝吞噬除頻器、三角積分調變器(SDM)。在壓控振盪器的部份，加入了二進位權重式開關，已達到可調頻寬夠大；在三角積分調變器的方面，為了避免電路的不穩定發生，使用多級雜訊整形(MASH)架構。整體的鎖定時間經由模擬大約16μs，可合成的頻率為3.4~4.2GHz，適用於WiMAX通訊系統中。

關鍵字

頻率合成器 ； 三角積分調變器

並列摘要

Recently, with the technology develop, the frequency synthesizer has not only a good phase noise performance but also a wide synthesizable range. In the thesis, the author designs a fractional frequency synthesizer with a wide bandwidth for WiMAX communication system. This frequency synthesizer includes the phase frequency detector, charge pump, loop filter, complementary LC cross couple voltage control oscillator, pulse swallow counter divider, sigma-delta modulator. In the VCO, a binary weighted band switching capacitors skill is used to make the tuning range wide enough; in sigma-delta modulator, in order to avoid the circuit unstable, the Multi stAge Noise Shaping(MASH) architecture is adopted. The locking time in this work is about 16μs, and it can synthesize the frequency from 3.4 to 4.2 GHz and it is suitable for WiMAX communication system.

並列關鍵字

Frequency synthesizer ； sigma-delta modulator

參考文獻

[1] Behzad Razavi, Design of Analog CMOS Integrated Circuits. Mc Graw Hill, 2001.

[2] R.C. Chang, L.C. Kuo, “A differential type CMOS phase frequency detector,” Proceedings of the Second IEEE Asia Pacific Conference, pp.61-64

[4] E.J. Hernandez, A.D. Sanchez , “Positive Feed-back CMOS charge-pump circuit for PLL Applications,” Proceedings of the 44th IEEE 2001 Midwest Symposium, vol. 2, pp.836-839, 2001

[5] S. Pamarti, L. Jansson, and I. Galton, “A wideband 2.4-GHz delta-sigma fractional-N PLL with 1-Mbs/s in-loop modulation,”IEEE J. Solid-State Circuits, pp. 49-62, Jan. 2004

[6] B. De Muer and M. S. J. Steyaert, “A CMOS monolithic Delta-Sigma controlled fractional-N frequency synthesizer for DCS-1800,”IEEE J. Solid-State Circuits, pp. 835-844,July 2002.