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連結:
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連結:
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連結:
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連結:
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連結:
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連結:
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[2.14] J. C. Lin, S. Y. Chen, H. W. Chen, Z. W. Jhou, H. C. Lin, S. Chou, J. Ko, T. F. Lei, and H. S. Huang, “Investigation of DC hot-carrier degradation at elevated temperatures for n-channel metal-oxide-semiconductor field-effect-transistor of 0.13 µm technology,” Japanese Journal of Applied Physics, vol. 45, no. 4B, 2006, pp. 3144-3146.
連結:
-
[2.15] S. Chakravarthi, A. T. Krishnan, V. Reddy, C. F. Machala, and S. Krishnan, “A comprehensive framework for predictive modeling of negative bias temperature instability,” IEEE International Reliability Physics Symposium, 2004, pp. 273-282.
連結:
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連結:
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[3.1] Y. Taur and T. H. Ning, Fundamentals of modern VLSI device, 2th, p.73, 2010.
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