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  • 學位論文

具電感電流均流校正技術之快速鎖定延遲鎖定迴路應用於暫態調變固定導通時間控制之四相位降壓型轉換器

An Inductor Current Balancing Technique for Fast-locking Delay-locked Loop Based Four-phase Buck Converter with Transient-modulated Constant On-time Control for Fast Load Transient Response

指導教授 : 陳中平
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摘要


本論文提出了一個快速鎖定延遲鎖定迴路應用於暫態調變固定導通時間控制之四相位降壓型轉換器,並且提出了一個新穎的電感電流均流校正技術,稱為脈衝寬度縮減技術,其可同時校正多相位轉換器中各相位脈衝寬度調變信號的責任週期與相位差。 為了達到更快速的負載暫態響應,我們在延遲鎖定迴路中,採用改良式的雙緣觸發之相位偵測器,亦即自動切換單/雙緣觸發之相位偵測器,藉以達成快速鎖定的機制。 本研究使用之降壓型轉換器,操作於一千萬赫茲之切換頻率,並使用三百三十奈米亨利之電感與二十二微米法拉之電容。輸入電壓為三點三伏特,輸出電壓為一點八伏特,而負載電流範圍為零點四安培到一點四安培。本作品在台積電零點一八微米互補式金屬氧化物半導體製程下,佔晶片面積六點一七毫米平方公尺。

並列摘要


This thesis presents a fast-locking delay-locked loop (DLL) based four-phase DC-DC buck converter, which is manipulated by transient-modulated constant on-time control (TMCOT). Besides, a novel inductor current balancing method called pulse-width-shrunk technique (PWST) is proposed and it is capable of simultaneously calibrating the duty cycle and the phase error of pulse-width modulation (PWM) signals in the DLL-based multi-phase converter. For the sake of much faster load transient response, the DLL adopts a modified dual edge triggered phase detector (DET-PD), namely automatic switching single/dual edge triggered phase detector (ASS/DET-PD), to accomplish the fast-locking mechanism. The buck converter is operated at 10 MHz switching frequency, and it employs a 330 nH inductor and a 22 μF output capacitor. The input voltage is 3.3V, and the output voltage is 1.8V. The load current ranges from 0.4A to 1.4A. The fully-integrated circuit is implemented in TSMC 0.18-μm CMOS process and the chip area is 6.17mm^2.

參考文獻


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