Title

A Skew-Window based Methodology for Timing Fixing in Multiple Power Modes

DOI

10.6688/JISE.2015.31.5.17

Authors

Wei-Kai Cheng;Po-Han Wu;Yi-Hsuan Chiu

Key Words

multiple power modes ; adjustable delay buffers (ADBs) ; clock gating ; clock skew ; dynamic power

PublicationName

Journal of Information Science and Engineering

Volume or Term/Year and Month of Publication

31卷5期(2015 / 09 / 01)

Page #

1817 - 1834

Content Language

英文

English Abstract

In the low power design of integrated circuits, multiple power modes and clock gating are the two common techniques to reduce dynamic power consumption. In the multiple power modes designs, replacing some of the normal buffers with adjustable delay buffers (ADBs) and assign different delay values in different power modes is one of the promising solutions to satisfy the clock skew constraint. On the other hand, when the clock gating technique is applied, usually gate splitting is necessary to satisfy the enable timing constraint. However, both ADBs insertion and gate splitting increase the hardware cost. In this paper, under both the enable timing constraint and clock skew constraint, we propose a skew-window based methodology to reduce the total hardware cost of ADBs and clock gates simultaneously. In comparison with when only ADBs insertion or gate splitting technique is applied, experimental results show that our methodology can satisfy the constraints in all the power modes and reduce the hardware cost effectively.

Topic Category 基礎與應用科學 > 資訊科學
Times Cited
  1. 胡明全(2016)。基於混合基因暨模擬退火法能感知繞線擁擠且考量電壓衰退之電源網路規劃法。成功大學電機工程學系學位論文。2016。1-48。
  2. 陳奕儒(2017)。基於運動訓練系統之自動評估架構-使用隱馬可夫模型及分群演算法。成功大學工程科學系學位論文。2017。1-30。