針對測試壓縮的平行次序自動測試向量產生器

Parallel Order Automatic Test Pattern Generation for Test Compaction

陳佑維(Yu-Wei Chen)

指導教授 ： 李建模

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2016年)

https://doi.org/10.6342/NTU201603794

摘要

生成壓縮的測試集對於降低測試成本是非常重要的。在此論文中，我們提出了一種新的測試壓縮演算法，可以實現高度的壓縮，稱為平行次序動態測試壓縮(Parallel Order Dynamic Test Compaction)。我們的結果顯示，在單個測試向量生產的過程中，次級故障的次序對於測試壓縮是非常重要的。我們使用GPU去同時執行許多不同次序的次級故障，並選擇測試到最大故障數量的最佳測試向量。實驗結果顯示，我們的測試長度比高度壓縮的商業自動測試向量產生器短40%，我們的測試長度是迄今為止所有以前發佈過的方法中最小的。我們的結果顯示，我們的技術也有助於壓縮N次偵測的測試集。在N=3、N=5、N=8中，我們的測試長度至少比商業自動測試向量產生器短了四分之一。

關鍵字

平行化自動測試向量產生器 ； 測試壓縮

並列摘要

Generating a compacted test set is very important to reduce the cost of testing. In this thesis, we proposed a novel test compaction algorithm which achieve high compaction, called Parallel Order Dynamic Test Compaction (PO-DTC). Our results show that the order of secondary faults within a single test generation is very important for test compaction. We use GPU to launch many parallel ATPG with different orders of secondary faults. Then we choose the best test pattern, which detects the largest number of faults. Experimental results show that our test length is 40% shorter than that of a highly compacted commercial ATPG. Our test length is the smallest among all previous work published so far. Our results show that our technique is also useful to compact N-detect test sets. Our test length is at least 1/4 short than that of the commercial ATPG for N=3, N=5, N=8.

並列關鍵字

parallel ATPG ； test compaction

參考文獻

[2] Amyeen, M. Enamul, et al. "Evaluation of the quality of N-detect scan ATPG patterns on a processor." Test Conference, 2004. Proceedings. ITC 2004. International. IEEE, 2004.

[4] Barnhart, Carl, et al. "OPMISR: the foundation for compressed ATPG vectors."Test Conference, 2001. Proceedings. International. IEEE, 2001.

[5] Benware, Brady, et al. "Impact of multiple-detect test patterns on product quality." null. IEEE, 2003.

[8] Chang, Jonathan TY, et al. "Analysis of pattern-dependent and timing-dependent failures in an experimental test chip." Test Conference, 1998. Proceedings., International. IEEE, 1998.

[9] X. Cai, P. Wohl, J. A. Waicukauski, and P. Notiyath, “Highly Efficient Parallel ATPG Based on Shared Memory,” Proc. Int’l Test Conf., pp. 1-7, 2010.