結合UML與SystemC針對同作行為的系統設計方法論

隨著電機資訊領域的蓬勃發展，使得現今電子系統的設計瓶頸已不再是單一晶片中邏輯閘間的時間延遲，而逐漸轉變成系統中晶片間溝通所需的時間延遲與系統耗電量的考量，所謂的單晶片系統(System-On-Chip, SOC)設計也因此應運而生。由於SOC的設計流程會依據系統需求規格將整個系統架構切分成許多子系統與各類功能元件，並分別以軟體或是硬體的方式來實現，透過圖形化的塑模語言來提升系統設計的抽象化層級將有助於系統設計者掌握整體系統的本質架構及主要功能模組。雖然SystemC已提供數個抽象化層級來進行系統設計，且在每一個抽象化層級皆可以經由模擬與驗證來確保系統的正確性，但其終究是以程式碼的方式來呈現；藉由結合在軟體系統中被廣泛使用的統一塑模語言(Unified Modeling Language, UML)來進行以SystemC為基礎的SOC設計，將可以進一步地抽象化系統設計層級，也就是以UML提供的圖形元素來進行單晶片系統設計。本研究藉由UML的Profile延伸機制來針對SystemC提供的硬體導向類別建構對應的構造型(Stereotype)，以及相關的標記值(Tagged Value)與規範(Constraint)，並將其實現在選定的電腦輔助軟體工程(Computer Aided Software Engineering, CASE)工具之上，其為Sparx Systems Enterprise Architect與Microsoft Visual Studio .NET 2003；透過建構好的SystemC Profile與程式碼產生樣版便可以用來設計單晶片系統，並自動產生對應的SystemC原始程式碼。由於硬體系統的並行行為(Concurrent Behaviors)與軟體系統的循序行為(Sequential Behaviors)於本質上迥異，本研究將使用所建構的UML Profile與程式碼產生樣版來進行兩個具有同作行為的單晶片系統設計案例，以說明結合UML與SystemC針對具有同作行為系統的設計方法。

關鍵字

單晶片系統；統一塑模語言；軟硬體協同設計；同作行為；電腦輔助軟體工程

並列摘要

Increasing demands for more performance have taken the system designs based on VLSI chips to their limits. The design bottleneck now is the interconnect delays and power consumptions rather than the basic gate delays. One way to eliminate the latency and power consumptions of accessing data external to the chip is putting all the various VLSI components into a single chip. It leads to the design paradigm of System-On-Chip (SOC), in which all the functionality of a complete system is put into a single silicon die, including both the software and hardware components. As the process of SOC design is getting more and more complicated, raising the abstraction layer can help system designers focus on the essential elements of the design. Since the SystemC language has already provided several layers of abstraction, systems to be constructed can initially be designed in the software-based un-timed functional models and further be refined to lower abstraction level to get the more detailed design. However, by the assistance of the United Modeling Language (UML), which is commonly used in designing software systems, the highest level of abstraction provided in SystemC can even be raised. Based on the idea of raising the abstraction level of the SystemC language by the UML, a methodology for system level design is proposed to realize the designing process for concurrency: An UML profile that catches the hardware-oriented characteristics of SystemC is constructed in the thesis, which is implemented subsequently on the chosen Computer Aided Software Engineering (CASE) tools ‘Enterprise Architect’ and ‘Microsoft Visual Studio .NET 2003’. System-On-Chip (SOC) designs can thus be built based upon the constructed UML profile for SystemC and the source codes of SystemC can be generated automatically through the templates for code generation. Two case studies that both have concurrent behaviors are given in the last to illustrate the proposed process of SOC design, simple verifications and simulations are carried out as well.

並列關鍵字

Computer Aided Software Engineering (CASE) ； Concurrency ； SW/HW Codesign ； SystemC ； System-On-Chip (SOC) ； Unified Modeling Language (UML)

參考文獻

[1] B. P. Douglass, Real Time UML：Advances in the UML for Real-Time Systems, 3rd Ed., Addison Wesley, 2004.

[3] C. Xi, L. JianHua, Z. ZuCheng, S. YaoHui, "Modeling SystemC Design in UML and Automatic Code Generation", in Proc. of ASP-DAC’05, Shanghai, China, 2005.

[7] E. Riccobene, P. Scandurra, A. Rosti, and S. Bocchio, “A SoC design Methodology Involving a UML 2.0 Profile for SystemC,” in Proc. of DATE’05, Munich, 2005.

[12] J. Henkel, "Closing the SoC design gap," Computer, Volume 36, Issue 9, pages 119 – 121, Sept. 2003.

[13] J. Warmer, A. Kleppe, The Object Constraint Language：Getting Your Models Ready for MDA, 2nd Ed., Addison-Wesley, Boston, 2003.

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結合UML與SystemC針對同作行為的系統設計方法論

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