應用於無線接收機之多模態連續時間四相位帶通三角積分調變器設計

Design of Multi-Standard Continuous-Time Quadrature Bandpass Delta-Sigma Modulators for Wireless Receivers

何丞諺(Chen-Yen Ho)

指導教授 ： 林宗賢

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2009年)

https://doi.org/10.6342/NTU.2009.02519

摘要

本篇論文中提出了能夠應用在多模態無線接收機的連續時間四相位帶通三角積分調變器(Continuous-Time Quadrature Bandpass ΔΣ Modulator)以及創新的電路技術來增進線性度、提高動態範圍以及降低功耗的目標。
在第一章中，討論到軟體定義無線電(Software-Defined Radio, SDR)之構想便是希望藉由發展單一傳收機來適用於數種無線通訊傳輸規格，而本論文之研究重點便是在於研究接收機中適用於多規格的類比數位轉換器(Analog-to-Digital Converter, ADC)。在第二章中，介紹基本的連續時間三角積分調變器概念。在連續時間四相位帶通三角積分調變器轉換資料的過程中，四相位I/Q (In-phase/Quadrature-phase) 通道中的類比電路元件存在著mismatch的效應，影響整體電路線性度以及解析度的表現。如上即是所為 I/Q 不匹配現象，此部分將在第三章作分析。
在第四章中，我們提出了適用於GSM-EDGW/Bluetooth/WCDMA的四相位帶通(Quadrature Band-pass)的三模式連續時間三角積分調變器來達到系統所要求的SNR值。基於低功率考量，利用後端提出具備I/Q不匹配修正技術之數位電路來協助修正三角積分調變器的操作，降低了操作功率，並且能夠減低I/Q mismatch的影響，達到較高的鏡像斥拒比(Image Rejection Ratio, IRR)。數位電路校正技巧可以在不影響類比電路操作下，大幅改善I/Q通道不對稱的現象。此晶片下線以及量測採用0.18-um製程技術，所設定的操作電壓為1.8V，所有模態的總功率消耗皆在9 mW以下，相對應的FOM 為1.77/1.46/1.36 (pJ/conv.)。在不同的模態下GSM-EDGE/Bluetooth/WCDMA可以達到82/71/60 dB的線性範圍(Dynamic Range)，量測到的Inter-Modulation Distortion (IMD)皆高於66dB而IRR在三種模態之下都可以達到65 dB以上，主要晶片的面積為1.448 x 1.368 mm2。
在第五章中，提出一個三模態GSM-EDGE/UMTS/DVB-T運用於程式化數位低中頻接收機具備功率調整技術之連續時間四相位帶通三角積分調變器。於前一作品不同之處在於，此設計能夠於不同模態中操作在寬頻調整的取樣頻率(51.2-240MHz)同時達到更佳的FOM。此晶片下線以及量測採用0.18-um製程技術，所設定的操作電壓為1.8V，運用了新的低中頻切換機制以及功耗調整的技術。此設計之模擬結果在GSM-EDGE/UMTS/DVB-T模態中分別可達到SNDR 83/63/62 dB，整體的FOM則是1.06/0.82/0.81 (pJ/conv.)。主要晶片的面積為1.538 x 1.458 mm2。

關鍵字

三角積分調變器 ； 類比數位轉換器 ； 數位類比轉換器 ； 四相位不匹配校正 ； 四相位帶通 ； 低中頻 ； 零中頻 ； 功率消耗指標 ； 軟體定義無線電 ； 認知無線電網路 ； I/Q 不匹配 ； 鏡像斥拒比

並列摘要

This thesis presents multi-standard Continuous-Time Quadrature Bandpass ΔΣ modulators for wireless receivers and innovative circuit techniques to improve linearity, increase dynamic range, and reduce power consumption.
The idea of software-defined radio (SDR) is to develop a single transceiver which can integrate many wireless communication specifications which is introduced in Chapter 1. This thesis aims to study and implement the analog to digital data converter (ADC) for SDR receiver with Continuous-Time Quadrature Bandpass ΔΣ modulator architecture. In Chapter 2, the basic concepts of Continuous-Time ΔΣ modulator will briefly be discussed. During the process that Continuous-Time Quadrature Bandpass ΔΣ modulator converts the analog signal, components between the I/Q channels exist mismatch effects which degrades the linearity and resolution of total system. It’s called I/Q mismatch effects which will be analysed in detail in Chapter 3.
In Chapter 4, according to these requirements, we proposed two works in this thesis. The first work is a Tri-mode GSM-EDGE/Bluetooth/WCDMA Continuous- Time Quadrature Bandpass ΔΣ modulator. Based on the low power design issue, we utilize backend I/Q mismatch shaping technique with digital circuit to assist ADC in reducing power consumption and decreasing I/Q mismatch effect in Continuous-Time Quadrature Bandpass ΔΣ modulator to get high image rejection ratio (IRR). This work is implemented with TSMC 0.18-um process under 1.8-V supply voltage. The modulator achieves 83/71/60 dB dynamic range at GSM-EDGE/Bluetooth /WCDMA tri-mode system while dissipating less than 9mW from measurement result. The equivalent FOM are 1.77/1.46/1.36 (pJ/conv.) The inter-modulation distortion (IMD) distances are better than 66 dB and IRR performances are better than 65dB at all modes. The chip area is about 1.448 x 1.368 mm2.
In Chapter 5, the second one is a GSM-EDGE/UMTS/DVB-T Continuous- Time Quadrature Bandpass ΔΣ modulator for programmable digital Low-IF receivers. Unlike the previous work, the proposed modulator operates in different modes with different sampling rates (51.2-240MHz) and achieves better FOM. Implemented with TSMC 0.18-um process under 1.8-V supply voltage, new tunable Low-IF and power scalable techniques are adopted. This post simulation result shows 83/63/62 dB SNDR at GSM-EDGE/UMTS/DVB-T tri-mode system and overall FOM are 1.06/0.82/0.81 (pJ/conv.). The chip area is about 1.538 x 1.458 mm2.

並列關鍵字

Delta–sigma (DS) modulator ； analog–to-digital convertor (ADC) ； digital–to-analog convertor (DAC) ； quadrature mismatch shaping (QMS) ； quadrature bandpass (QBP) ； low intermediate frequency (Low-IF) ； zero intermediate frequency (Zero-IF) ； figure of merit (FOM) ； software defined radio (SDR) ； cognitive radio network (CRN) ； I/Q mismatch ； image rejection ratio (IRR)

參考文獻

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[2] S. Ouzounovl, R. van Veidhoven, C. Bastiaansen, K. Vongehrl, R. van Wegberg, G. Geelen, L. Breems, A. van Roermund, “A 1.2V 121-Mode CT DS Modulator for Wireless Receivers in 90nm CMOS,” in IEEE ISSCC Dig.Tech. Papers, pp. 242–243, Feb. 2007.

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[4] P. Silva, L. Breems, K. Makinwa, R. Roovers and J. Huijsing ,” An IF-to-Baseband ΣΔ Modulator for AM/FM/ IBOC Radio Receivers With a 118 dB Dynamic Range,” IEEE J. Solid-State Circuits, vol. 42, 1076-1089, May 2007.

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