橫向閘控具鋁/二氧化矽/p型矽結構之金屬-絕緣層-半導體穿隧二極體研究與其應用

Study of Laterally Gated Metal-Insulator-Semiconductor Tunnel Diode with Al/SiO2/Si(p) Structure and Its Applications

廖建舜(Chien-Shun Liao)

指導教授 ： 胡振國

國立臺灣大學/電機資訊學院/電子工程學研究所/博士(2017年)

https://doi.org/10.6342/NTU201701230

摘要

本篇論文對於橫向閘控具鋁/二氧化矽/p型矽結構之金屬-絕緣層-半導體穿隧二極體元件電特性進行深入的探討。該元件之電特性與其氧化層厚度有相當大的關係，僅僅一個奈米的厚度變化即可以有相當大的電特性改變。該元件具有負轉導特性，其峰對谷電流比值隨著元件氧化層厚度從2.2奈米增加到3.3奈米可以有超過五次方倍的增益。本論文中得到該元件最大的峰對谷電流比值為1.3×10^6。該元件在氧化層厚度為約3至4奈米時具有電晶體特性。由於與傳統金氧半場效電晶體有截然不同的轉導機制，該元件可以具有很好的次臨界特性。該元件之次臨界擺幅可以低於傳統電晶體的次臨界擺幅極限值(60 mV/decade)。本論文中得到該元件最小的次臨界擺幅為15.3 mV/decade，其範圍超過三次方的電流範圍。另外，該元件也可以拿來做記憶體的應用。該元件之金屬-絕緣層-半導體穿隧二極體部分可以當作感測器來偵測儲存於閘極氧化層堆疊結構中之電荷。於記憶體讀取操作時，閘極電壓為開路，如此相較於傳統快閃記憶體，該元件擁有較低的電荷流失與功率消耗。由於具有簡易製程以及上述幾種高性能的優勢，橫向閘控鋁/二氧化矽/p型矽金屬-絕緣層-半導體穿隧二極體元件非常具有潛力做為未來電晶體以及記憶體等元件應用。

關鍵字

金氧半穿隧二極體 ； 蕭特基能障調變 ； 負轉導 ； 電晶體 ； 陡峭次臨界斜率 ； 記憶體 ； 陽極氧化

並列摘要

In this dissertation, the electrical properties of the laterally gated metal-insulator-semiconductor (MIS) tunnel diode with Al/SiO2/Si(p) structure had been thoroughly investigated. It was found that the electrical properties of the laterally gated MIS(p) tunnel diode device can be dramatically changed by engineering the oxide thickness only within 1 nm variation. The negative transconductances were found in the transfer characteristics of the devices. The peak-to-valley-current ratio (PVCR) can have five orders enhancement as the oxide thickness of the device increases from 2.2 nm to 3.3 nm. The maximum PVCR obtained in this dissertation is 1.3×10^6. The device has transistor properties as the oxide thickness is around 3–4 nm. Due to the extraordinary transconductance mechanism different from the conventional metal-oxide-semiconductor field-effect transistor (MOSFET), the laterally gated MIS(p) tunnel diode device could have superior subthreshold swing (S.S.). The S.S. can be lower than the theoretical limit, 60 mV/decade, of the conventional MOSFET. The minimum S.S. obtained in this dissertation is 15.3 mV/decade for more than 3 decades. Furthermore, the device can be used for memory cell applications. The MIS tunnel diode in the device can be utilized as a sensor to detect the memory state charges stored in the dielectrics stack of the lateral gate. During the reading process, the gate voltage is open, which reduces the charge loss and lowers the power consumption comparing with the conventional flash memory cell. With the properties of simple fabrication process and high performance, the laterally gated MIS(p) tunnel diode device has promising potential for the next generation transistor and memory cell applications.

並列關鍵字

MIS tunnel diode ； Schottky barrier modulation ； negative transconductance ； transistor ； steep subthreshold slope ； memory ； anodization

參考文獻

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